1249 Physical Design Jobs - Page 17

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performanc...

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performanc...

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Physical Implementation activities for Sub systems "which includes Floor-planning, Place and Route, CTS, Formal verification, Physical Verification (DRC/LVS), PDN, Timing Closure and power optimization. Should have good exposure to PD implementation of PPA critical Cores and making right PPA trade-off decisions. Strong expertise in timing convergence of high frequency data-path intensive Cores and advanced STA concepts Well versed with the Block level PnR convergence with Synopsys ICC2/ Cadence Innovus and timing convergence in PTSI/Tempus in latest technology nodes Good understanding of clocking architect...

Where ASIC Physical Design, Manager Bengaluru, Karnataka, India Engineering Employee Apply Save Job Share Email LinkedIn X Facebook Jump to Overview Job Description Benefits Culture How We Hire Overview Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries. Play Video Job Description Category Engineering Hire Type Employee Job ID 12252 Remote Eligible No Date Posted 24/...

We are looking for a skilled SAP DRC Consultant with 19 years of experience to join our team at Forward Eye Technologies. The ideal candidate will have a strong background in SAP DRC and be able to work effectively in a fast-paced environment. Roles and Responsibility Collaborate with cross-functional teams to design and implement SAP DRC solutions. Provide technical expertise and support for SAP DRC projects. Develop and maintain documentation for SAP DRC implementations. Troubleshoot and resolve complex technical issues related to SAP DRC. Conduct training sessions for end-users on SAP DRC functionality. Work closely with stakeholders to understand business requirements and develop solutio...

KEY RESPONSIBILITIES: Define and drive key Frontend/Beckend/Physical Design methodologies. Partner with AMD CAD Teams, Design team, physical design teams to ensure seamless end to end design flows. Work with existing development teams to define roadmaps for existing flows and assist in difficult technical debug. Work closely with design teams to gather requirements and develop strategies to tackle key technical problems. Work on Floor-plan, Physical Implementation of Power-plan, Synthesis, Placement, CTS, Timing Closure, Routing, Extraction, Physical Verification (DRC & LVS), Crosstalk Analysis, EM/IR Handling different PNR tools - Synopsys ICC2, ICC, Design Compiler, PrimeTime, StarRC, Ment...

Key Responsibilities: Design of IP and subsystems with integration of AMD and other 3rd party IPs Perform quality checks (lint, CDC, and power rule checks) of power-gated digital designs Work collaboratively with other members of the IP team to support design verification, implementation (synthesis, constraints, static timing analysis), and delivery to SOC Work in partnership with SOC teams to support the IP at SOC level, including connectivity, DFT, verification, physical design, firmware, and post-silicon bring-up Lead a subsystem development team of 4 to 5 members. Preferred Experience: 5-7 years full-time experience in IP hardware design Proficiency in verilog/system verilog RTL logic de...

THE ROLE: Join AMD as we push the boundaries of whats possible in graphics and compute technology. We are seeking a talented RTL Physical Design Engineer to contribute to the development and optimization of our cutting-edge CDNA and RDNA graphics IP. This role involves transforming sophisticated RTL designs into robust and efficient physical layouts, critical to the performance of our next-generation graphics and compute solutions. THE PERSON: You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezo...

THE ROLE: Join AMD as we push the boundaries of whats possible in graphics and compute technology. We are seeking a talented RTL Physical Design Engineer to contribute to the development and optimization of our cutting-edge CDNA and RDNA graphics IP. This role involves transforming sophisticated RTL designs into robust and efficient physical layouts, critical to the performance of our next-generation graphics and compute solutions. THE PERSON: You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezo...

THE ROLE: As a Silicon Design Engineer in the AMD AECG ASIC TFM (Tools Flows Methodology) team, you will work with design experts to come up with the best implementation methodologies/flows and work on development and support of the BE flows. THE PERSON: Engineer with good attitude who seeks new challenges and has good analytical and communication skills. Candidate needs to have the ability and desire to learn quickly and should be a good team player. KEY RESPONSIBILITIES: Define and drive key Beckend/Physical Design methodologies. Partner with AMD CAD Teams, Design team, physical design teams to ensure seamless end to end design flows. Work with existing development teams to define roadmaps...

THE ROLE: We are looking for an adaptive, self-motivative design engineer to join our growing team. As a key contributor, you will be part of a leading team to drive and improve AMDs abilities to deliver the highest quality, industry-leading technologies to market. The Physical Design Engineering team furthers and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development. THE PERSON: Engineer with good attitude who seeks new challenges and has good analytical and communication skills. Candidate needs to have the ability and desire to learn quickly and should be a good team player. KEY RESPONSIBLITIES: Handling SOC floorplanning/Parti...

Key Responsibilities: Critical Issue Resolution: Identify and resolve complex physical design problems during dry runs and execution. Provide independent analysis and solutions to critical issues impacting design integrity and performance, including challenges specific to CPU core physical design such as timing closure, optimization, and signal integrity Securing Execution Excellence: Ensure high standards of execution excellence by providing strategic guidance and support to the PD execution team. Monitor and evaluate the effectiveness of physical design processes and methodologies, ensuring optimal performance and power efficiency for CPU cores Bridging Methodology and Execution: Act as a ...

As a highly motivated and innovative digital design engineer at Synopsys, you will play a crucial role in driving the innovations that shape the future in the Era of Pervasive Intelligence. Your expertise in ASIC design methodology and flows, particularly focusing on low power analysis and optimization, will be instrumental in empowering the creation of high-performance silicon chips and software content. With a proven track record in working with advanced nodes, especially at 5nm and below, you will be responsible for developing and driving digital design methodologies to achieve the lowest power consumption. Your strong background in both digital and physical design, coupled with your prof...

Qualcomm India Private Limited is seeking a CPU Integration CAD Engineer to join the Engineering Group, specifically in the Hardware Engineering department. As part of the NUVIA team, which is now integrated into Qualcomm, you will be involved in reimagining silicon and developing computing platforms that aim to revolutionize the industry. This role offers the opportunity to collaborate with exceptionally skilled engineers to design innovative solutions that excel in performance, energy efficiency, and scalability. To qualify for this position, you must hold a Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or a related field, along with at least 6 yea...

You are a strategic thinker passionate about driving solutions in Data Domain Architect . You have found the right team. As a Vice President in Data Domain Architect, where youll play a strategic role in the rapidly evolving Payments Operations industry. This role offers the opportunity to provide data architecture leadership and strategy within the Strategy, Innovation & Digitization Data team. Youll collaborate closely with product, analytics, and technology teams, making this role perfect for a motivated team member with a passion for data and problem-solving. As a Data Engineer Associate Payment Operations within the Payments Operations organization, you will be responsible for providing...

SMTS SILICON DESIGN ENGINEER T HE ROLE : As a member of the Radeon Technologies Group, you will help bring to life cutting-edge designs. As a member of the front-end design/integration team, you will work closely with the architecture, IP design, Physical Design teams, and product engineers to achieve first pass silicon success. THE PERSON: A successful candidate will work with senior silicon design engineer s . The candidate will be highly accurate and detail-oriented, possessing good communication and problem-solving skills. K EY RESPONSIBLITIES : Implementation and verification of DFT architecture and features Scan insertion and ATPG pattern generation ATPG patterns verification with gate...

Where ASIC Physical Design, Sr Engineer Bengaluru, Karnataka, India Engineering Employee Apply Save Job Share Email LinkedIn X Facebook Jump to Overview Job Description Benefits Culture How We Hire Overview Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries. Play Video Job Description Category Engineering Hire Type Employee Job ID 12343 Remote Eligible No Date Posted...

Candidate must have completed 03-06 months of training in VLSI. Candidate must have knowledge about: VLSI - Design Verification VLSI - Physical Design VLSI - Hardware VLSI - Analog Circuit Analog (Memory Design/Layout) VLSI - DFT RTL

Job Overview : We are seeking an exceptional Physical Verification Engineer to take a key role in oursemiconductor design team. As a Block/Fullchip/Partition Physical Verification Engineer , you willResponsible for development and implementation of cutting-edge physical verification methodologiesand flows for complex ASIC designs. You will collaborate closely with cross-functional teams to ensurethe successful delivery of high-quality designs Responsibilities : Drive physical verification DRC, Antenna, LVS, ERC at cutting edge FinFET technology nodesfor various foundries. Physical verification of a complex SOC/ Cores/ Blocks DRC, LVS, ERC, ESD, DFM, Tape out. Work hands-on to solve critical ...

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including fai...

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including fai...

We are seeking an exceptional STA Engineer to take a key role in our semiconductor designteam. As STA Engineer you will get opportunity to work with talented and passionate STAengineers and create designs that push the envelope on performance, energy efficiency andscalability. you will lead the STA for cutting-edge high speed and complex large ASIC. Youwill collaborate closely with cross-functional teams to ensure the successful delivery of highquality designs Responsibilities: Responsible for leading a team of STA engineers and close high frequency, lower tech node complex designs. Understand Design Architecture and timing requirements Develop timing constraints SDC and validate Work with ...

We are seeking an exceptional Senior Physical Design Engineer to take a key role in our semiconductor design team. As a Senior Physical Design Engineer, you will lead the development and implementation of cutting-edge physical design methodologies and flows for complex ASIC designs. You will collaborate closely with cross-functional teams to ensure the successful delivery of high-quality designs Key Responsibilities Perform Synthesis, floor planning, placement, Clock, routing, and PPA optimization for High Speed Advance ASICs. Define and drive physical design strategies to meet aggressive performance, power, and area targets. Conduct detailed analysis of timing, power, and area, and drive de...

NVIDIA is continuously reinventing itself, with a rich history that includes inventing the GPU, which sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. The current global boom in artificial intelligence research demands highly scalable and massively parallel computation horsepower, a challenge where NVIDIA GPUs excel. As a part of NVIDIA, you will be joining a dynamic team focused on tackling difficult global challenges and amplifying human creativity and intelligence. The diverse and supportive environment at NVIDIA encourages everyone to strive for excellence and make a lasting impact on the world. NVIDIA is seeking a tal...

You will be responsible for executing block level P&R and Timing closure activities, including owning up block level P&R and performing Netlist2GDS on blocks. You will work on the implementation of multimillion gate SoC designs in cutting edge process technologies such as 28nm, 16nm, 14nm, and below. Your role will require strong hands-on expertise in physical design aspects like Synthesis, Floor Planning, Power Plan, Integrated Package and Floorplan design, Place and Route, Clock Planning, Clock Tree Synthesis, complex analog IP integration, Parasitic Extraction, Timing Closure, Power / IR Drop (Static and Dynamic), Signal Integrity Analysis, Physical Verification (DRC, ERC, LVS), DFM, and ...