1693 Physical Design Jobs - Page 18

Person should have complete end-end knowledge of the Netlist- Gds Tapeout methodology preferably at a chip level Must have hands on experience of working on multiple chips in the above methodology Must have lead a team in the above methodology May not be hands-on But Should have in-depth understanding of the timing concepts and requirements at Synthesis level and it s effect and relation with Place and route and timing closure May not be hands-on but should have good knowledge of nuances of timing closure in STA Must have hands-on experience of working on Physical verification and must have lead a team to Tapeout Should have good communication skills both written and verbal Experience of wor...

This position is for RTL designer role in DSP processor team. The position involves in-depth understanding of the ASIC design flow from RTL to GDS2 and the challenges posed by advanced technologies. The successful candidate will possess detailed understanding of RTL design, synthesis, static timing analysis, formal verification, PLDRC, clock domain crossing, and low power techniques. Knowledge and experience of microprocessor integration is a definite advantage. Skills/Experience Must have 3 to 15 years of practical experience with details of RTL development (VHDL and/or Verilog) including: functional and structural RTL design, design partitioning, simulation and regression, collaboration wi...

General Summary: Develops block, macro, or chip level layouts and floorplans according to project requirements, specifications, and design schematics. Applies understanding of design manuals, established processes, layout elements, and basic electronic principles to create accurate designs that meet project needs. Conducts analyses, tests, and verifies designs using different tools and techniques to identify and troubleshoot issues, and stays abreast of new verification methods. Works with multiple internal and external stakeholders to align on projects, provide updates, and resolve issues. Minimum Qualifications: Bachelor's degree in Electrical Engineering, Computer Science, Mathematics, El...

General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer ...

This team is directly responsible for growth of General Trade QR team at Paytm. The BDM achieves these goals by creating Funnel and Closure of accounts. Superpowers/ Skills that will help you succeed in this role : 1. Adaptability: Attitude of optimism and can-do orientation with ability to think creatively and navigate successfully past barriers and obstacles 2. Focus through the Noise: Ability to tune out distractions to focus work on priority goals and tasks 3. Persuasion: Ability to present concepts, ideas and proposals in a manner that is perceived positively by and clearly resonates with intended audiences and stakeholders, while encouraging action. 4. Professionalism: Ability to proje...

This team is directly responsible for growth of General Trade QR team at Paytm. The BDM achieves these goals by creating Funnel and Closure of accounts. Superpowers/ Skills that will help you succeed in this role : 1. Adaptability: Attitude of optimism and can-do orientation with ability to think creatively and navigate successfully past barriers and obstacles 2. Focus through the Noise: Ability to tune out distractions to focus work on priority goals and tasks 3. Persuasion: Ability to present concepts, ideas and proposals in a manner that is perceived positively by and clearly resonates with intended audiences and stakeholders, while encouraging action. 4. Professionalism: Ability to proje...

Expectations/ Requirements: l Key account Manager is principally responsible for Signing New Logos/ Merchants/Brands from Large Enterprise / Corporate Accounts. l The BDM achieves these goals by creating Funnel and Closure of accounts. Superpowers/ Skills that will help you succeed in this role: l Adaptability: Attitude of optimism and can-do orientation with ability to think creatively and navigate successfully past barriers and obstacles l Focus through the Noise: Ability to tune out distractions to focus work on priority goals and tasks l Persuasion: Ability to present concepts, ideas and proposals in a manner that is perceived positively by and clearly resonates with intended audiences a...

Working experience of Physical Design Implementation Working experience of Physical Verification, Timing Signoff. Good attitude to learn and deliver. Work from office only. Lower technology node experience. Experience in writing scripts and automation. Working knowledge of Low Power ASIC

Role Overview: As a Qualcomm Hardware Engineer at Qualcomm India Private Limited, you will be responsible for planning, designing, optimizing, verifying, and testing electronic systems to launch cutting-edge, world-class products. You will collaborate with cross-functional teams to develop solutions and meet performance requirements. This position will focus on floor-planning expertise at both block and top levels for industry-leading CPU core designs, with an emphasis on scalability and achieving aggressive Power, Performance, and Area (PPA) targets. Key Responsibilities: - Drive floorplan architecture and optimization in collaboration with PD/RTL teams to maximize PPA - Engage in cross-fun...

Role Overview: You will be responsible for backup and recovery processes and tools related to databases. Your role will involve having a strong understanding of database knowledge, including logical and physical design. You should also have experience in troubleshooting database performance issues and be familiar with query tuning concepts. As part of your responsibilities, you will perform various data management tasks such as loading, unloading, updating, restoring, and removing data to maintain the accuracy of the database. Additionally, you will be required to carry out Database Maintenance activities like Adhoc Reorgs, Runstats, and monitor scheduled maintenance activities based on dema...

Role Overview: As a candidate for this position, you should hold a Bachelor's degree in Computer Science, IT, a related field, or possess equivalent practical experience. Additionally, you should have at least 5 years of experience in static timing analysis, synthesis, physical design, and automation. It is crucial that you have expertise in physical design tool automation, including synthesis, P&R, and sign-off tools. Join a dynamic team that is dedicated to pushing boundaries and developing custom silicon solutions that drive the future of Google's direct-to-consumer products. Your contributions will play a key role in innovating products that are beloved by millions worldwide. By leveragi...

Experience on RTL2GDS Implementation i.e. Synthesis, Floor planning, Placement, CTS, Routing, STA, Power Integrity Analysis, Physical Verification. Should have experience on Physical Design Methodologies and lower tech nodes like 7nm, 6nm & 5nm. Should have experience in handling high frequency partitions & memory dominated designs. Should have experience on programming in Tcl/Tk/Perl. Well versed with timing constraints, STA and timing closure. Should have worked on minimum 3 tapeouts. Should have hands-on experience on Hierarchical level PV & signoff closure Tools: Innovus, Tempus Experience Range : 5 - 15 years Primary Skills : Physical Design, CTS, STA & Physical Verification.

Role & responsibilities Semiconductor recruiter Immediate joiner Bangalore

Role & responsibilities Hi team, we are hiring for the role ASIC Engineer • 5-8 years of hands-on physical design implementation experience along with APR flow development and PPA analysis • STA closure at block • Experience in Advanced process technology nodes (6/7 nm preferred) • Experience with Cadence layout tools (Innovus, Tempus, etc..) • Hands on work experience in Physical verification closure (DRC/LVS/Antenna) with Caliber tool Preferred candidate profile exp : 5 - 8 years Immediate joiner (15 days) Location : HYD Thanks & Regards Jeevan Mail : jeevankumar.m@acesoftlabs.com Call : 7036308530

Dear Candidates, Greetings of the Day We are Hiring for Physical Design Engineer Location: Hyderabad(WFO) Experience: 5-8 Years NP: Immediate No. of positions: 02 interview: 2-3 rounds(Virtual & face to face) Job Description: • 5-8 years of hands-on physical design implementation experience along with APR flow development and PPA analysis • STA closure at block • Experience in Advanced process technology nodes (6/7 nm preferred) • Experience with Cadence layout tools (Innovus, Tempus, etc..) • Hands on work experience in Physical verification closure (DRC/LVS/Antenna) with Caliber tool • Experience in closing all the IR issues within the block based on feedback • Should be strong in fundamen...

• Responsible for high performance microprocessor blocks RTL to GDSII implementation • Perform block level synthesis, floor-planning, placement and routing. • Close the design to meet timing, power budget and area. • Implement ECO's to address functional bugs and timing violations. • Team player, with good problem solving and communication skills. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 5-8 years industry experience in physical design methodology. Good knowledge and hands on experience in physical design methodology which include logic synthesis,placement, clock tree synthesis, routing . Should be knowledgeable in...

Your Role Implement and configure SAP Document and Reporting Compliance (DRC) in S/4HANA environments. Design scalable solutions for global e-invoicing and statutory reporting. to Design e2e processes with in RAR track and integration with other modules Collaborate with technical teams for interface development and automation. Support legal change management and country-specific compliance updates. Client facing role as FI-RAR lead and Strong knowledge in OTC and RTR Process. Your Profile 4-12 years of SAP functional consulting experience, including SAP DRC (ACR). Strong knowledge of global statutory reporting and e-invoicing frameworks. Hands-on experience with SAP DRC configuration across ...

About The Role This role involves the development and application of engineering practice and knowledge in the following technologiesElectronic logic programs (FPGA, ASICs); Design layout and verification of integrated circuits (ICs),printed circuit boards(PCBs), and electronic systems; and developing and designing methods of using electrical power and electronic equipment; About The Role - Grade Specific Focus on Electrical, Electronics and Semiconductor. Develops competency in own area of expertise. Shares expertise and provides guidance and support to others. Interprets clients needs. Completes own role independently or with minimum supervision. Identifies problems and relevant issues in ...

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including fai...

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including fai...

Responsibilities: * Design, test & verify physical designs using Primetime, Innovus & PNR. * Collaborate with cross-functional teams on floor planning & timing closure.

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including fai...

Required skills: He/She should be able to do top-level floor planning, PG Planning, partitioning,placement, scan-chain-reordering, clock tree synthesis, timing optimization, SI aware routing, timing analysis/closure and ECO tasks (timing and functional ECOs), SI closure, design rule checks (DRC), and Logical vs. Schematic (LVS) checks, Antenna checks. He/She should have worked on 65nm or lower node designs with adv low power techniques such as Voltage Islands, Power Gating and substrate-bias. Provide technical guidance, mentoring to physical design engrs. Interface with front-end ASIC teams to resolve issues. Low Power Design - Voltage Islands, Power Gating, Substrate-bias techniques. Timing...

Role & responsibilities Description : 4 to 8 years of experience in Design and development of critical analog, mixed-signal, custom digital block. TSMC 16/12nm,7nm,5nm,3nm and below (foundries are also fine like Intel, Samsung, GF) Preferably TSMC 5nm/3nm experience. Responsible full chip level integration support. Verification flows - LVS/DRC/DFM/Antenna check/EMIR experience. Responsible for on-time delivery of block-level layouts of acceptable quality. Expertise in Cadence VLE/VXL and Mentor Graphic Caliber DRC/LVS is a must. Analog blocks like Regulators/Charge pumps/Power Management etc.. HBM experience is an added advantage. PLs share resumes/CV to pradeep.b@acesoftlabs.com Preferred c...

Role & responsibilities Responsible for Design and development of critical analog, mixed-signal, custom digital block, and full chip level integration support. Expertise in Cadence VLE/VXL and Mentor Graphic Caliber DRC/LVS is a must. Perform layout verification like LVS/DRC/Antenna, quality check and support documentation. Responsible for on-time delivery of block-level layouts with acceptable quality. Excellent problem-solving skills in physical verification of custom layout. Demonstrate high quality and accurate execution to meet project schedule/milestones in multiple project environment. Ability to guide junior team-members in their execution of Sub block-level layouts & review critical...