1249 Physical Design Jobs - Page 18

As a Physical Design Engineer, you will be responsible for the complex SOC top physical implementation of next generation SOCs in the area of mobile application processors, modem sub-systems, and connectivity chips. Your role will involve tasks such as Synthesis, Place and Route, STA, timing, and physical signoffs. You should have hands-on experience in physical design and timing closure of both complex blocks and full-chip designs. You will be expected to demonstrate expertise in top-level floor planning, including partition shaping and sizing, pin placement, channel planning, high-speed signal and clock planning, and feed-through planning. A strong understanding of timing, power, and area ...

We are seeking a Senior Physical Design Engineer / Lead / Manager with 5 to 20 years of experience to join our team in Bangalore. The ideal candidate will have a strong background in physical design and a proven track record in the field. If you are a talented and experienced professional looking for a challenging opportunity in physical design, we encourage you to apply. Please send your resume to radha.mishra@coreictech.com.,

. Location: Bangalore/Kolkata Experience: 3+ years Opportunity Snapshot: We are looking to hire sharp ASIC Design Engineer with excellent communication and leadership skills. You will be part of a fast paced team responsible for delivering high-speed ASICs for large, complex systems. You will have a significant opportunity to interact with system design teams across geographies. Open communications, empowerment, innovation, teamwork and customer success are the foundations of the team with "pay for performance" culture. Thus, you set your own limits for learning, achievements and rewards. Responsibilities: Define and architect high-performance blocks for the latest, most advanced networking ...

Are you passionate about ensuring silicon design accuracy and power integrity at advanced nodes? We re looking for a skilled PDV & Power Analysis Engineer to join our growing team! Key Responsibilities: -Physical design verification and power analysis using Calibre, Innovus, and Voltus -Hands-on layout edits in Innovus and deep analysis of IR/EM reports from Voltus -Expertise in understanding and resolving DRC violations using Calibre and Innovus -Strong knowledge of IR drop and electromigration issues and their resolution -Scripting proficiency in TCL, AWK, and Python -Exposure to ADI flows and power domain-based designs is a strong advantage Who Should Apply: Engineers with a strong backgr...

SMTS SILICON DESIGN ENGINEER (AECG ASIC PD FCL Lead) T HE ROLE : We are looking for an adaptive, self-motivative design engineer to join our growing team. As a key contributor, you will be part of a leading team to drive and improve AMDs abilities to deliver the highest quality, industry-leading technologies to market. The Physical Design Engineering team furthers and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development. THE PERSON: Engineer with good attitude who seeks new challenges and has good analytical and communication skills. Candidate needs to have the ability and desire to learn quickly and should be a good team player...

Astera Labs is a global leader in purpose-built connectivity solutions that unlock the full potential of AI and cloud infrastructure. Our Intelligent Connectivity Platform integrates PCIe , CXL , and Ethernet semiconductor-based solutions and the COSMOS software suite of system management and optimization tools to deliver a software-defined architecture that is both scalable and customizable. Inspired by trusted relationships with hyperscalers and the data center ecosystem, we are an innovation leader delivering products that are flexible and interoperable. Discover how we are transforming modern data-driven applications at www.asteralabs.com . Basic qualifications: Strong academic and techn...

We are seeking a highly experienced Senior Physical Design Engineer with 8+ years of experience in block-level and full-chip physical implementation. The candidate should be proficient in physical design flows and methodologies for advanced technology nodes. Key Responsibilities: Drive physical implementation from RTL to GDSII (floorplanning, placement, CTS, routing) Perform timing analysis, congestion analysis, and physical verification (DRC/LVS) Optimize for performance, power, and area (PPA) Collaborate closely with RTL, STA, DFT, and package teams Own signoff checks (IR drop, EM, Antenna, Crosstalk, etc.) Support tape-out and silicon validation activities Requirements: 8+ years of experi...

Perform Sub system level floor planning, placement, and routing for high-performance microprocessor design. Collaborate with cross-functional teams to achieve design goals. Close the design to meet timing, power, and area requirements. Implement engineering change orders (ECOs) to rectify functional bugs and timing issues. Ensure the quality and efficiency of the RTL to GDS2 implementation process. Required education Master's Degree Preferred education Bachelor's Degree Required technical and professional expertise 8+ years of industry experience Good knowledge and hands on experience in physical design , timing and methodology which include logic synthesis, placement, clock tree synthesis, ...

This role does design and layout of complex VLSI (very large scale integration) circuits using graphic editing tools in cutting edge technological nodes. A major portion of the job is in creation of new physical design data from concepts, partial schematics or a working knowledge of overall requirements. Responsibilities include checking the design integrity with respect to semiconductor ground rules and the logical function of the circuit. Symbolic circuit data (schematics) are converted to physical shapes which represent the semiconductor process. The role ranges from manual shapes and checking tool manipulations to extended team coordination and methodology creation. The employee guides f...

Design and development of processor L2 , L3, Non cacheable units and LLC (Last Level Cache) for high-performance IBM Systems. - Design and architect L2 cache and LLC as driven by capacity, latency, bandwidth, and RAS requirements. - Develop the features, present the proposed architecture in the High level design discussions - Develop micro-architecture, Design RTL, Collaborate with Verification, DFT, Physical design, FW, SW teams to develop the feature - Signoff the Pre-silicon Design that meets all the functional, area and timing goals - Participate in silicon bring-up and validation of the hardware - Lead a team of engineers, guide and mentor team members, represent as Logic Design Lead in...

As a Logic design Engineer in the IBM Systems division, you will be responsible for the microarchitecture design and development of features to meet Secure, high performance & low power targets of the Mainframe and / or POWER customers. Deep expertise in the implementation of functional units within the core / cache / Memory controller / Interrupt / crypto / PCIE / DLL/Test Pervassive Additional responsibilities: logic (RTL) design, timing closure, CDC analysis etc. Understand and Design Power efficient logic. Agile project planning and execution. RequirementsMasters in VLSI with demonstrated experience in the micro architecture and design of state of art Processor features to enhance high p...

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the worlds most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ Job Description: We are seeking a highly experienced and innovative Fellow to join our Physica...

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the worlds most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ We are seeking a highly skilled and innovative Physical Design Specialist to join our team. Th...

THE ROLE: The focus of this role in the AECG ASIC organization is to lead physical design for next generation ASICsthat meet Engineering, Business and Customer requirements. Engineer with good attitude who seeks new challenges and has good analytical and communication skills. Candidate needs to have the ability and desire to learn quickly and should be a good team player. THE PERSON: AMD is looking for an engineering leader passionate about driving the best Power Performance Area (PPA) of ASIC solutions for AECG customers. The ideal candidate will have proven experience in driving physical design optimization to deliver industry leading performance/area and performance/power. In this role th...

THE ROLE: The focus of this role in the AECG ASIC organization is to lead physical design for next generation ASICsthat meet Engineering, Business and Customer requirements. Engineer with good attitude who seeks new challenges and has good analytical and communication skills. Candidate needs to have the ability and desire to learn quickly and should be a good team player. THE PERSON: AMD is looking for an engineering leader passionate about driving the best Power Performance Area (PPA) of ASIC solutions for AECG customers. The ideal candidate will have proven experience in driving physical design optimization to deliver industry leading performance/area and performance/power. In this role th...

THE ROLE: As a member of the Server Group, you will help bring to life cutting-edge designs.?As a member of the Physical Design team, you will work closely with the architecture, IP design, Packaging teams, and product engineers to achieve first pass silicon success. THE PERSON: A successful candidate will work with senior silicon design and Staff engineers. The candidate will be highly accurate and detail-oriented, possessing good communication and problem-solving skills. KEY RESPONSIBLITIES: Guiding the team on PNR for Block closure Physical Implemenation of Block Working on PPA improvemnets Cleaning up the DRC and LVS signoff the block in Timing, IR and PV PREFERRED EXPERIENCE: 14+ years ...

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world's most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ Responsibilities THE ROLE: The position will involve working with a very experienced CPU phys...

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world's most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ SMTS SILICON DESIGN ENGINEER THE ROLE: The position will involve working with a very experien...

KEY RESPONSIBLITIES: Full chip level Die size estimation, Floor-planning, Power planning, IO planning, package compatibility, IO ring creation and ESD analysis Full chip Hierarchical planning, block planning , block level constraints, hierarchical clock tree implementation, block integration and chip finishing. Low power design with power estimation/optimization includingclock gating, power gating, power switch implementation and other low power techniques to reduce total power consumption. Full chip/Sub-system/Partition level Synthesis, Logic equivalence, implementation of low power UPF/CPF Full chip / sub-system level constraints, MMMC & cross talk aware timing closure with latest OCV base...

KEY RESPONSIBILITIES: Implementing RTL to GDS2 flow Handling Floor-plan, Physical Implementation of Power-plan, Synthesis, Placement, CTS, Timing Closure, Routing, Extraction, Physical Verification (DRC & LVS), Crosstalk Analysis, EM/IR Handling different PNR tools - Synopsys ICC2, ICC, Design Compiler, PrimeTime, StarRC, Mentor Graphics Calibre, Apache Redhawk PREFERRED EXPERIENCE: 7+ years of professional experience in physical design, preferably with high performance designs. Experience in automated synthesis and timing driven place and route of RTL blocks for high speed datapath and control logic applications. Experience in automated design flows for clock tree synthesis, clock and power...

We are looking for an experienced Physical Design Engineer responsible for complete physical design and implementation, including floor planning, P&R, timing closure, power and noise analysis, and back-end verification across multiple advanced node projects. Key Responsibilities: Perform chip floor planning, power/clock distribution, P&R, and chip assembly Achieve timing closure and conduct power/noise analysis Manage complete netlist to GDSII flow for ASIC designs Handle synthesis, STA, and physical implementation of hard-macros and/or full-chip designs Collaborate across teams to ensure successful backend design and delivery Utilize low-power design techniques and apply them effectively in...

As a Semiconductor Sales/Business Development Manager based in India, you will play a crucial role in leading and expanding semiconductor business engagements throughout the country. This position is well-suited for individuals who possess a proven track record in ASIC/SoC/IC services or product sales within the semiconductor industry. Your primary responsibilities will include owning the entire sales lifecycle, from prospecting and lead qualification to solution positioning, proposal development, and deal closure. You will be tasked with establishing and nurturing relationships with Tier-1 and Fabless semiconductor customers, while collaborating closely with internal engineering and deliver...

You will be part of Kinara, a Bay Area-based venture backed company, founded based on research conducted at Stanford University. Kinara's game-changing AI solutions aim to revolutionize what individuals and businesses can accomplish. Their Ara inference processors, combined with an innovative SDK, offer unparalleled deep learning performance at the edge. This enables the acceleration and optimization of real-time decision-making, emphasizing the importance of speed and power efficiency. By embedding high-performance AI into edge devices, Kinara contributes to creating a smarter, safer, and more enjoyable world. As the field of Edge AI is on the verge of a significant growth phase, Kinara is ...

Job Description Job Description Handling block layouts like Charge Pumps, I/O s, Reference generators Involve in the full chip Signal/Power planning, die size estimation. Interact with project lead (design and layout) and CAD for various requirements Work with the project lead on chip level integration task and tape out procedures Schedule planning of the assigned task. Person will be working with our India and US physical design teams for all tasks. Mentor junior team members Qualifications BE/ME/BTECH/MTECH/MS with relevant 4-8 years Engineering experience Qualifications Experience in Cadence Platform Knowledge of layout concepts like Matching, shielding, Symmetry, ESD, latch-up, Reliabili...

"> Search Jobs Find Jobs For Where Search Jobs Staff RTL Design Engineer Noida, Uttar Pradesh, India Engineering Employee Apply Save Job Share Email LinkedIn X Facebook Jump to Overview Job Description Benefits Culture How We Hire Overview Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries. Play Video Job Description Category Engineering Hire Type Employee Job ID 122...