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DFT Engineer

DFT Engineer

Corpseed

6 - 10 years

0 Lacs

delhi

Posted:4 days ago| Platform: Shine logo

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Skills Required

dft scan insertion atpg debugging coverage analysis transition delay test coverage analysis compression technique drc issues manufacturing atpg test patterns onchip test compression techniques synopsis tetramax dftmax cadence encounter test mbist insertion memory test validation mentor tools

Work Mode

On-site

Job Type

Full Time

Job Description

As a DFT Engineer in Bangalore, India with over 6 years of experience, your role will involve the following responsibilities: - In-depth knowledge and hands-on experience in scan insertion, ATPG, coverage analysis, and Transition delay test coverage analysis. - Analyzing design and proposing the best compression techniques. - Debugging and resolving DRC issues. - Collaborating with the front-end team to provide solutions and ensure DFT DRCs are fixed. - Generating high-quality manufacturing ATPG test patterns for SAF (stuck-at fault), transition fault (TDF), and Path Delay fault (PDF) models through the use of on-chip test compression techniques. - Working experience in Synopsis TetraMax/DFTMax and Cadence Encounter Test is required. - Expertise in MBIST insertion and Memory test validation. - Additional expertise in Mentor tools is a plus. Qualifications required for this role include: - A Bachelor's Degree in Electrical, Electronics, or Computer Engineering.,

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DFT Engineer