6.0 - 10.0 years

0 Lacs

delhi

On-site

As a DFT Engineer in Bangalore, India with over 6 years of experience, your role will involve the following responsibilities: - In-depth knowledge and hands-on experience in scan insertion, ATPG, coverage analysis, and Transition delay test coverage analysis. - Analyzing design and proposing the best compression techniques. - Debugging and resolving DRC issues. - Collaborating with the front-end team to provide solutions and ensure DFT DRCs are fixed. - Generating high-quality manufacturing ATPG test patterns for SAF (stuck-at fault), transition fault (TDF), and Path Delay fault (PDF) models through the use of on-chip test compression techniques. - Working experience in Synopsis TetraMax/DFT...

Posted 4 days ago

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AMS Verification ThunderSoft

0.0 years

0 Lacs

hyderabad, telangana, india

On-site

To work in AMS Verification domain with relevant experience in mixed signal SOCs or subsystems/IPs. Leading a project for AMS requirements is a value add. Proficiency in AMS simulation environment using Cadence/Synopsys/Mentor tools Knowledge of digital design techniques, Verilog HDL, and standard RTL coding styles, as well as analog circuit basics, with previous analog design experience a plus. Candidate should be familiar with the concepts of behavioral modeling - both digital (Verilog-D) and analog (Verilog-A or Verilog-AMS) Experience in SV and UVM testbench development/modifications from mixed signal perspective is a plus Functional knowledge of analog and mixed signal building blocks, ...

Posted 1 month ago

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Senior Engineer MSV Infineon Technologies

4.0 - 7.0 years

0 Lacs

Bengaluru, Karnataka, India

On-site

Candidate should be familiar with the concepts of behavioral modeling - both digital (Verilog-D) and analog (Verilog-A or Verilog-AMS). Experience in SV and UVM testbench development/modifications from mixed signal perspective is a plus. Job Description In your new role you will: Candidate should have working experience with AMS Verification on multiple SOCs or sub-systems. One should have proficiency in AMS simulation environment using Cadence/Synopsys/Mentor tools. Knowledge of digital design techniques, Verilog HDL, and standard RTL coding styles, as well as analog circuit basics, with previous analog design experience a plus. Candidate should be familiar with the concepts of behavioral m...

Posted 2 months ago

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