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Smart Soc Solutions
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DFD (Design For Debug) DV

DFD (Design For Debug) DV

Smart Soc Solutions

8 - 13 years

|

3 - 6 Lacs

Posted:18 hours ago| Platform:

Apply

Skills Required

jtag power management axi protocols tracing triggers soc verification electrical engineering vhdl rtl design axi fpga modelsim rtl coding ahb protocols system verilog asic verification dfd c upf uvm lps verilog silicon fpga design vlsi

Work Mode

Work from Office

Job Type

Full Time

Job Description

Qualifications:

Bachelor’s or Master’s degree in Electrical Engineering or related field (BE/BTech/M.E/M.Tech)

Strong communication skills, both written and verbal

Experience:

At least 8 years of professional experience in the field

Skills:

Proficiency in Trace, Cross-Trigger, JTAG, and AXI protocols

Expertise in security protocols, real boot processes, Debug mode, Warm reset, power management, and LP-UPF

Previous experience with AMD is considered an advantage

NoteInterested candidates should submit a detailed resume highlighting their relevant experience and skills. Job Category VLSI (Silicon engineering)
Job Type Full Time
Job Location IndiaBangalore IndiaHyderabad

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