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Design Verification Engineer

Design Verification Engineer

Name: Jobpe
Address: T-Hub, Plot No 1/C, Sy No 83/1, Raidurgam panmaktha, Knowledge City Rd, Hyderabad, Telangana, 500081, IN
Telephone: +91-83339-09630
Price range: Free

Deori Recruiterhub Solutions (opc)

8 - 12 years

6 - 10 Lacs

Hyderabad Pune Bengaluru

Posted:1 month ago| Platform:

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Skills Required

Design Verification RDMA HBM Chip Design Test Bench Development LPDDR UVM System Verilog

Work Mode

Work from Office

Job Type

Full Time

Job Description

Skillset:

DV | System Verilog | UVM | Protocol Expertise

Must-Have Skills:

Strong expertise in System Verilog (SV) and UVM
Proven experience in Test Bench Development
Deep protocol knowledge in at least one of the following:
PCIe / UCIe / CXL / NVM
AXI / ACE / CHI
Ethernet / RoCE / RDMA
DDR / LPDDR / HBM

Key Responsibilities

Lead and drive verification for block, subsystem, or SoC level designs
Strong experience in IP/subsystem/SoC verification using SV/UVM
Verification experience with ARM or RISC-V CPU based subsystems
Work with C/Assembly for low-level testing
Perform Power Aware Simulations using UPF

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Design Verification Engineer