16 Rdma Jobs

About our Group: Intel NEX team is responsible for delivering top-notch Ethernet products and plays a pivotal role in Intel's transition from a PC-centric company to a key player enabling the cloud and a multitude of smart, interconnected computing devices. Our Ethernet products are instrumental in moving global data and serve as the backbone for cloud services and telecommunications data centers. We are a team of problem-solvers, trailblazers, and visionaries committed to developing network technologies that are currently leading and reshaping data center ecosystems. As a globally acclaimed organization, we are in search of exceptional individuals to drive our growth during this exciting phase in Ethernet networking technology. If you are ready to embark on this journey, we invite you to join us. We are looking for a highly motivated, dynamic, team-oriented engineer with 4-8 years of relevant experience, eager to undertake the challenge of overseeing IP, Subsystem, and SoC Pre-Silicon verification for the latest cutting-edge products within the Ethernet Product Group at Intel. In this role, you will be involved in leading and participating in the verification of IP, Sub-systems, and SoC. Your main focus will be on executing pre-Silicon validation plans in alignment with the IP/product release schedule and deliverables, conducting debugging, reporting failures, identifying potential failures, and assisting in determining the root cause of failures. You will be responsible for creating/reviewing verification test plans, engaging in discussions across various domains to gain a comprehensive understanding of requirements, designing the architecture and verification environment in UVM for pre-silicon RTL verification, developing/running/debugging tests in System Verilog, mentoring other engineers in utilizing the verification infrastructure and constructing test benches. Your tasks may include participating in block/subsystem/SoC level testing, contributing to functional coverage, code coverage reviews, and implementing feedback. Additionally, you should be equipped to provide support for post-silicon/platform failures related to the IP provided. Timely goal achievement, highlighting issues and obstacles to management promptly, and collaborating with teams across diverse locations are key aspects of this role. Minimum Qualifications: Bachelors/Masters degree in Electrical, Electronics, or Computer Science streams. Relevant Experience: 3 to 8 Years. Preferred Skillset: Proficiency in UVM with the ability to architect complex testbenches and verification infrastructure, adept at debugging and issue resolution. Familiarity with protocols such as AXI, AHB, APB, ACE, AXI Stream, foundational knowledge of A-profile Cores, and expertise in Networking Protocols like PCIe, Ethernet, RDMA, NVME, or experience in DDR will be highly advantageous. Job Type: Experienced Hire Shift: Shift 1 (India) Primary Location: India, Bangalore Business Group: The Network & Edge Group amalgamates network connectivity and edge into a business unit committed to driving end-to-end product leadership in technology. Its portfolio encompasses leading products in Ethernet, Switch, IPU, Photonics, Network, and Edge that are of paramount importance to our clientele. *Please note that job posting details (such as work model, location, or time type) are subject to change.,

Meet the Team Join our innovation team on a mission to revolutionize how enterprises leverage AI. Operating with the agility of a startup and the focus of an incubator, we are assembling a close-knit group of AI and infrastructure experts who are passionate about bold ideas and share the common goal of reimagining systems from the ground up. Our aim is to deliver breakthrough solutions that redefine what is achievable in a faster, leaner, and smarter manner. We thrive in a dynamic, experimentation-rich environment where the integration of new technologies is not just welcomed but expected. Here, you will collaborate closely with seasoned engineers, architects, and innovators to develop iconic products that have the potential to transform industries and introduce entirely new operational models for enterprises. If you are excited by the prospect of tackling challenging problems, enjoy pushing the boundaries of what is possible, and aspire to contribute to shaping the future of AI infrastructure, we are eager to connect with you. Impact Cisco is in search of a forward-thinking AI Infrastructure Engineer to aid in the design and implementation of next-generation AI products. This role will be focused on creating high-performance, efficient, and reliable solutions that drive AI workloads across Cisco's ecosystem. As an AI Infrastructure Engineer at Cisco, you will play a crucial role in molding the AI systems that facilitate cutting-edge innovations. Your work will directly impact: - The performance and efficiency of AI workloads on the node. - The reliability and availability of AI systems for Cisco's customers. - Advancements in AI and machine learning infrastructure, leading to enhanced utilization and efficiency across various industries. - Collaboration with internal teams to introduce system-level innovations across different Cisco products. Your contributions will be instrumental in enabling Cisco to maintain its leadership in AI infrastructure development and influence the wider AI and machine learning community. Key Responsibilities - Design and develop node-level infrastructure components to support high-performance AI workloads. - Benchmark, analyze, and optimize the performance of AI infrastructure, including CUDA kernels and memory management for GPUs. - Minimize downtime through seamless configuration and upgrade architecture for software components. - Manage the installation and deployment of AI infrastructure on Kubernetes clusters, including the utilization of CRDs and operators. - Develop and deploy efficient telemetry collection systems for nodes and hardware components without impacting workload performance. - Work with distributed system fundamentals to ensure scalability, resilience, and reliability. - Collaborate across teams and time zones to shape the overall direction of AI infrastructure development and achieve shared goals. Minimum Qualifications - Proficiency in programming languages such as Rust, C/C++, Golang, Python, or eBPF. - Strong understanding of Linux operating systems, including user space and kernel-level components. - Experience with Linux user space development, including packaging, logging, telemetry, and lifecycle management of processes. - Strong understanding of Kubernetes (K8s) and related technologies, such as custom resource definitions (CRDs). - Strong debugging and problem-solving skills for complex system-level issues. - Bachelor's degree or higher and relevant 5+ years of Engineering work experience. Preferred Qualifications - Linux kernel and device driver hands-on expertise is a plus. - Experience in GPU programming and optimization, including CUDA, UCX is a plus. - Experience with high-speed data transfer technologies such as RDMA. - Use of Nvidia GPU operators and Nvidia container toolkit and Nsight, CUPTI. - Nvidia MIG and MPS concepts for managing GPU consumption. #WeAreCisco #WeAreCisco where every individual brings their unique skills and perspectives together to pursue our purpose of powering an inclusive future for all. Our passion is connectionwe celebrate our employees diverse set of backgrounds and focus on unlocking potential. Cisconians often experience one company, many careers where learning and development are encouraged and supported at every stage. Our technology, tools, and culture pioneered hybrid work trends, allowing all to not only give their best, but be their best. We understand our outstanding opportunity to bring communities together and at the heart of that is our people. One-third of Cisconians collaborate in our 30 employee resource organizations, called Inclusive Communities, to connect, foster belonging, learn to be informed allies, and make a difference. Dedicated paid time off to volunteer80 hours each yearallows us to give back to causes we are passionate about, and nearly 86% do! Our purpose, driven by our people, is what makes us the worldwide leader in technology that powers the internet. Helping our customers reimagine their applications, secure their enterprise, transform their infrastructure, and meet their sustainability goals is what we do best. We ensure that every step we take is a step towards a more inclusive future for all. Take your next step and be you, with us!,

We are looking for a highly skilled HPC/GPU Operations Engineer with 6-10 years of experience to oversee the management, optimization, and maintenance of high-performance computing (HPC) infrastructure, specifically focusing on GPU-accelerated workloads. Your primary responsibilities will include ensuring the reliability, efficiency, and scalability of HPC systems used for scientific computing, AI/ML, and data-intensive applications. As an IC3 level professional, you will be tasked with the following responsibilities: - Managing and administering HPC clusters, GPU nodes, and high-speed interconnects. - Configuring GPU-accelerated workloads for AI/ML, scientific computing, and simulations. - Monitoring system performance, troubleshooting issues, and optimizing resource utilization. - Installing, configuring, and maintaining HPC-related software, libraries, and tools such as CUDA, OpenMP, and MPI. - Supporting containerized workflows using technologies like Docker and Singularity. - Ensuring software compatibility with GPU architectures from NVIDIA, AMD, and Intel. - Tuning GPU and CPU performance for specific workloads, including benchmarking and profiling. - Utilizing monitoring tools like Prometheus, Grafana, and Slurm to track system health and efficiency. - Optimizing scheduling and resource allocation in workload managers such as Slurm, PBS, and LSF. - Upholding system security and access control for HPC resources. - Applying software patches, firmware updates, and security best practices. - Assisting in regulatory compliance for HPC environments. - Providing support to researchers, data scientists, and engineers using HPC resources. - Developing and maintaining documentation on best practices, troubleshooting, and system usage. - Conducting training sessions or workshops on HPC/GPU computing. To qualify for this role, you should possess the following technical skills: - Experience in managing HPC clusters and GPU-based computing environments. - Proficiency in Linux system administration, scripting (Bash, Python), and automation (Ansible, Terraform). - Knowledge of parallel computing, GPU programming (CUDA, OpenCL), and HPC frameworks. - Familiarity with networking technologies such as Infiniband and RDMA, storage solutions like Lustre, GPFS, NFS, and virtualization. At Oracle, we are dedicated to leveraging cutting-edge technology to address current challenges while fostering an inclusive work environment that encourages innovation and collaboration. We offer a range of competitive benefits, flexible medical, life insurance, and retirement options, and support employee engagement in volunteer programs. We are committed to providing accessibility assistance or accommodation for individuals with disabilities throughout the employment process. If you require such assistance, please contact us via email at accommodation-request_mb@oracle.com or by phone at +1 888 404 2494 in the United States.,

At AMD, we strive to transform lives with our cutting-edge technology, enriching our industry, communities, and the world. Our mission is to develop innovative products that drive next-generation computing experiences, serving as the foundation for data centers, artificial intelligence, PCs, gaming, and embedded systems. Central to our mission is the AMD culture, where we continuously push the boundaries of innovation to address the world's most critical challenges. We are dedicated to achieving excellence in execution while fostering a work environment that values directness, humility, collaboration, and inclusivity of diverse perspectives. As a Senior Software Development Engineer at AMD, you will play a key role in the Datacenter team by developing high-performance I/O software for compute, storage, and network acceleration in hyperscale, virtualized data centers. Your responsibilities will involve designing and implementing embedded software for Linux and standalone products, specifically focusing on creating software subsystems to manage FPGA hardware solutions. We are looking for a dynamic engineer who is eager to learn and grow their skills while working with the latest FPGA technology. To excel in this role, you should have experience with C/C++, with knowledge of Python/System-C considered an advantage. Additionally, proficiency in software development within a Linux environment, firmware development, low-level driver development, register interface programming, as well as familiarity with general algorithms and data structures are essential. Experience with industrial standard devices such as Ethernet, PCIe, RDMA, and memory architectures like DDR/SDRAM/DMA is highly desirable. You should also have a proven track record of delivering high-quality software projects, experience in working on high-performance, low-latency, multi-threaded, high-throughput SRIOV-capable PCIe-subsystem drivers, and the ability to collaborate effectively with international teams. In this role, you will be responsible for iterative software development, involving coding, debugging, and creating regressions to ensure code performance meets specifications. You will also document code according to organizational standards and demonstrate a collaborative approach to learning and problem-solving. As a self-starter and team player, you will engage in mentoring, code reviews, and leveraging the expertise of others to enhance project outcomes. The ideal candidate for this position should hold a Bachelor's or Master's degree in Computer/Software Engineering, Computer Science, or a related technical discipline, with 5+ to 12 years of relevant experience. If you are passionate about driving innovation in software development and are excited to work on challenging projects that have a global impact, we encourage you to apply. Join us at AMD, where together we advance the future of technology and make a difference in the world. #LI-RP1,

Roles & Responsibilities: Architect, Design and Develop Storage solutions on DPUs in the areas of NVMe-PCIe NVMeoF(TCP, RDMA), VirtIO. Build Innovative solutions and solve challenging problems in areas of Storage Disaggregation, Virtualization, Storage services (Encryption, Compression,Replication and Erasure Coding), etc Contributions to Patents, Standards and Open Source Initiatives Work with AMD s architecture specialists to improve future products Apply a data minded approach to target optimization efforts Stay informed of software and hardware trends and innovations, especially pertaining to algorithms and architecture Design and develop new groundbreaking AMD technologies Participating in new ASIC and hardware bring ups Debug/fix existing issues and research alternative, more efficient ways to accomplish the same work Develop technical relationships with peers and partners PREFERRED EXPERIENCE: Prior Storage experience in any of NVMe, NVMe-oF, VirtIO, SCSI/FCP, iSCSI, RDMA and TCP areas Strong object-oriented programming background, C/C++ Strong systems programming background Exposure to Linux block layer, block device drivers (linux, ESXi, Windows), QUEM/KVM Virtualization, PCIe, TCP and basic networking is added advantage Ability to write high quality code with a keen attention to detail Experience with modern concurrent programming and threading APIs Experience with software development processes and tools such as debuggers, source code control systems (GitHub) and profilers is a plus Effective communication and problem-solving skills Motivating leader with good interpersonal skills ACADEMIC CREDENTIALS: Bachelor s orMastersdegree in Computer Science, Computer Engineering, Electrical Engineering, or equivalent

THE ROLE: AMD Datacenter team has an opening for a software Engineer to develop high performance I/O software for compute, storage and network acceleration in hyperscale, virtualized datacenters. Responsibilities include specification and development of Embedded Software for use in Linux and standalone products. This will involve designing and implementing software subsystems to control FPGA Hardware solutions. We are seeking a fast learning, dynamic engineer eager to develop their skills working with the latest FPGA technology. Skills/Experience Experience with C/C++ Experience with Python/System-C is an advantage. Experience with software development in a Linux environment Experience in firmware development, low level driver development, register interface programming, general algorithms and data structures. Experience with industrial standard devices e.g. Ethernet, PCIe, RDMA and Memory architectures DDR/SDRAM/DMA Experience in high performance and low latency, multi-threaded, high throughput SRIOV-capable PCIe-subsystem drivers for compute and network acceleration. Proven track record of delivering software projects that exceed customer quality expectations Experience in successfully executing projects which require interaction with international sites and culturally diverse teams Excellent interpersonal, written and verbal communication skills. A self-starter and team player Iterative Software Development Demonstrates software development skills and proficiency on coding projects within assigned area of responsibility Iteratively codes, debugs, and creates regressions to ensure that code performs as specified with good coverage Documents code to within acceptable standards for the organization Demonstrates a collaborative approach to learning and problem-solving, seeking out and leveraging the talent of others when necessary (e.g. mentoring, code reviews, etc.) ACADEMIC CREDENTIALS: Bachelor sorMaster sdegree in Computer/Software Engineering, Computer Science, or related technical disciplinewith 5+ to 12 yrs of experience.

As an AI Infrastructure Engineer at Cisco, you will join an innovative team with a mission to revolutionize how enterprises utilize AI. Operating with the agility of a startup and the focus of an incubator, we are building a close-knit group of AI and infrastructure experts. Our team is driven by bold ideas and a shared goal: to rethink systems from the ground up and deliver breakthrough solutions that redefine what is possiblefaster, leaner, and smarter. In this dynamic environment, where experimentation is abundant and new technologies are not just welcome but expected, you will collaborate with seasoned engineers, architects, and thinkers. Together, we craft iconic products that have the potential to reshape industries and unlock entirely new operational models for enterprises. If you are energized by solving challenging problems, enjoy pushing the boundaries of what is achievable, and aspire to shape the future of AI infrastructure, we are eager to meet you. Your role as an AI Infrastructure Engineer at Cisco will be instrumental in designing and implementing next-generation AI products. You will be focused on delivering high-performance, efficient, and reliable solutions that power AI workloads across Cisco's ecosystem. Your work will directly impact the performance, efficiency, reliability, and availability of AI systems for Cisco's customers, as well as drive advancements in AI and machine learning infrastructure. Key Responsibilities: - Design and develop node-level infrastructure components to support high-performance AI workloads. - Benchmark, analyze, and optimize the performance of AI infrastructure, including CUDA kernels and memory management for GPUs. - Minimize downtime through seamless configuration and upgrade architecture for software components. - Manage the installation and deployment of AI infrastructure on Kubernetes clusters, utilizing CRDs and operators. - Develop and deploy efficient telemetry collection systems for nodes and hardware components without impacting workload performance. - Work with distributed system fundamentals to ensure scalability, resilience, and reliability. - Collaborate across teams and time zones to shape the overall direction of AI infrastructure development and achieve shared goals. Minimum Qualifications: - Proficiency in programming languages such as Rust, C/C++, Golang, Python, or eBPF. - Strong understanding of Linux operating systems, including user space and kernel-level components. - Experience with Linux user space development, including packaging, logging, telemetry, and lifecycle management of processes. - Strong understanding of Kubernetes (K8s) and related technologies, such as custom resource definitions (CRDs). - Strong debugging and problem-solving skills for complex system-level issues. - Bachelor's degree or higher and a minimum of 5 years of relevant engineering work experience. Preferred Qualifications: - Linux kernel and device driver hands-on expertise is a plus. - Experience in GPU programming and optimization, including CUDA, UCX is a plus. - Experience with high-speed data transfer technologies such as RDMA. - Use of Nvidia GPU operators and Nvidia container toolkit and Nsight, CUPTI. - Nvidia MIG and MPS concepts for managing GPU consumption. At Cisco, we are dedicated to fostering an inclusive future where every individual brings their unique skills and perspectives together. Our employees celebrate diversity and focus on unlocking potential. We prioritize learning and development at every stage, offering opportunities for growth and multiple career paths. Our technology, tools, and culture support hybrid work trends, allowing everyone to excel and thrive. As a company, we recognize our responsibility to bring communities together, and our people are at the heart of that mission. One-third of our employees collaborate in our 30 employee resource organizations, known as Inclusive Communities, to connect, foster belonging, advocate for inclusivity, and make a positive impact. We provide dedicated paid time off for volunteering, allowing our employees to give back to causes they are passionate aboutnearly 86% of our employees actively participate. At Cisco, our purpose is driven by our people, making us a global leader in technology that powers the internet. We help our customers reimagine their applications, secure their enterprise, transform their infrastructure, and achieve their sustainability goals. Every step we take is a step towards a more inclusive future for all. Join us in taking your next step and being your authentic self with Cisco.,

THE ROLE: AMDis looking foraninfluentialsoftware engineerwho ispassionate about improving the performance of keyapplications and benchmarks . You will be a member of a core team ofincredibly talentedindustry specialists and will work with the very latest hardware and software technology.? THE PERSON: The ideal candidate should bepassionate about software engineering and possess leadership skillstodrivesophisticated issues to resolution. Able to communicate effectively and work optimally with different teams across AMD. KEY RESPONSIBILITIES: Work with AMD's architecture specialists to improve future products Apply a data minded approach to target optimization efforts Stay informed of software and hardware trends and innovations, especially pertaining to algorithms and architecture Design and developnew groundbreakingAMDtechnologies Participating in newASICand hardware bring ups Debugging/fixexisting issuesand research alternative, more efficient ways to accomplish the same work Develop technical relationships with peersandpartners PREFERRED EXPERIENCE: 10 years of experience in software development in domains of networking, RDMA, or system software 10 years of experience in software development in domains of networking in one of the following areas: Software data plane applications such as VPP/equivalent. P4/u-code based data plane development RDMA transport development Strong object-oriented programming background, C/C++ preferred Ability to write high quality code with a keen attention to detail Experience with modern concurrent programming and threading APIs Experience working in different operating systems or server environments is a plus Experience with software development processes and tools such as debuggers, source code control systems (GitHub) and profilers is a plus Effective communication and problem-solving skills Experience in performance tuning and debugging system level issues Experience in DPU or AI-NIC development is a huge plus ACADEMIC CREDENTIALS: Bachelor's orMaster'sdegree in Computer Science, Computer Engineering, Electrical Engineering, or equivalent

We are an innovation team on a mission to transform how enterprises harness AI. Operating with the agility of a startup and the focus of an incubator, we're building a tight-knit group of AI and infrastructure experts driven by bold ideas and a shared goal: to rethink systems from the ground up and deliver breakthrough solutions that redefine what's possible faster, leaner, and smarter. We thrive in a fast-paced, experimentation-rich environment where new technologies aren't just welcome they're expected. Here, you'll work side-by-side with seasoned engineers, architects, and thinkers to craft the kind of iconic products that can reshape industries and unlock entirely new models of operation for the enterprise. If you're energized by the challenge of solving hard problems, love working at the edge of what's possible, and want to help shape the future of AI infrastructure we'd love to meet you. Cisco is seeking a forward-thinking AI Infrastructure Engineer to help design and implement the next-generation AI products. This role will focus on delivering high-performance, efficient, and reliable solutions that power AI workloads across Cisco's ecosystem. As an AI Infrastructure Engineer at Cisco, you will play a pivotal role in shaping the AI systems that enable cutting-edge innovations. Your work will directly impact: - The performance and efficiency of AI workloads on the node. - The reliability and availability of AI systems for Cisco's customers. - Advancements in AI and machine learning infrastructure, enabling better utilization and improving efficiency for applications across industries. - Collaboration across internal teams to bring system-level innovation across different Cisco products. Your contributions will help Cisco maintain its leadership in AI infrastructure development and influence the broader AI and machine learning community. Key Responsibilities: - Design and develop node-level infrastructure components to support high-performance AI workloads. - Benchmark, analyze, and optimize the performance of AI infrastructure, including CUDA kernels and memory management for GPUs. - Minimize downtime through seamless config and upgrade architecture for software components. - Manage the installation and deployment of AI infrastructure on Kubernetes clusters, including the use of CRDs and operators. - Develop and deploy efficient telemetry collection systems for nodes and hardware components without impacting workload performance. - Work with distributed system fundamentals to ensure scalability, resilience, and reliability. - Collaborate across teams and time zones to shape the overall direction of AI infrastructure development and achieve shared goals. Minimum Qualifications: - Proficiency in programming languages such as Rust, C/C++, Golang, Python, or eBPF. - Strong understanding of Linux operating systems, including user space and kernel-level components. - Experience with Linux user space development, including packaging, logging, telemetry, and lifecycle management of processes. - Strong understanding of Kubernetes (K8s) and related technologies, such as custom resource definitions (CRDs). - Strong debugging and problem-solving skills for complex system-level issues. - Bachelor's degree+ and relevant 5+ years of Engineering work experience. Preferred Qualifications: - Linux kernel and device driver hands-on expertise is a plus. - Experience in GPU programming and optimization, including CUDA, UCX is a plus. - Experience with high-speed data transfer technologies such as RDMA. - Use of Nvidia GPU operators and Nvidia container toolkit and Nsight, CUPTI. - Nvidia MIG and MPS concepts for managing GPU consumption. #WeAreCisco where every individual brings their unique skills and perspectives together to pursue our purpose of powering an inclusive future for all. Our passion is connection we celebrate our employees" diverse set of backgrounds and focus on unlocking potential. Cisconians often experience one company, many careers where learning and development are encouraged and supported at every stage. Our technology, tools, and culture pioneered hybrid work trends, allowing all to not only give their best, but be their best. We understand our outstanding opportunity to bring communities together and at the heart of that is our people. One-third of Cisconians collaborate in our 30 employee resource organizations, called Inclusive Communities, to connect, foster belonging, learn to be informed allies, and make a difference. Dedicated paid time off to volunteer 80 hours each year allows us to give back to causes we are passionate about, and nearly 86% do! Our purpose, driven by our people, is what makes us the worldwide leader in technology that powers the internet. Helping our customers reimagine their applications, secure their enterprise, transform their infrastructure, and meet their sustainability goals is what we do best. We ensure that every step we take is a step towards a more inclusive future for all. Take your next step and be you, with us!,

As a member of Marvell, you will be part of a team that creates semiconductor solutions essential for the data infrastructure connecting the world in enterprise, cloud, AI, automotive, and carrier architectures. You will have the opportunity to impact individual lives, uplift entire industries, and contribute to the transformative potential of tomorrow. Marvell offers a platform for purposeful and enduring innovation, where you can thrive, learn, and lead. Your responsibilities at Marvell will involve developing cutting-edge switching and DPU-based solutions customized for enterprise and cloud-scale environments. You will work on optimizing control plane and data plane functionalities for switch platforms and DPUs, enhancing Layer 2/3 networking capabilities, and designing high-performance switching fabrics with advanced packet processing and telemetry. Additionally, you will integrate robust security features and contribute to open-source initiatives to define future networking standards. To excel in this role, you should hold a Bachelors/Master's degree in Computer Science, Electrical Engineering, or a related field with a minimum of 4-20 years of relevant experience. Proficiency in programming languages like C, C++, Python, and Lua scripting is essential. A deep understanding of Ethernet switching, Layer 2/3 protocols, DPUs, and networking standards is required, along with hands-on experience in various technologies such as SONiC, SAI, Cumulus Linux, OVS, DPDK, and DPU technologies. Moreover, familiarity with ARM multicore SoC architecture, high-speed packet I/O, and networking constructs like ACLs, routing, QoS, and load balancing is beneficial. Exposure to cloud networking, SDN, or network virtualization technologies is a plus. Strong analytical and problem-solving skills, effective communication and collaboration abilities, and a passion for continuous learning are essential traits for this role. At Marvell, you can expect competitive compensation and great benefits within a collaborative, transparent, and inclusive work environment. The company is committed to providing you with the necessary tools and resources to succeed, grow, and develop professionally. If you are interested in joining a dynamic team driving innovation in a fast-paced environment, Marvell could be the perfect place for you to thrive and make a meaningful impact. Visit our Careers page for more insights on what it's like to work at Marvell.,

Job Title: Network Driver Developer Location: Bengaluru, India Job Type: Full-Time, Work from Office Key Responsibilities: Design, develop, and maintain NIC drivers for Linux Kernel and other operating systems. Implement and optimize L2/L3 protocols , RDMA, and RoCE for high-performance networking applications. Collaborate with cross-functional teams to develop and test NIC firmware and software. Develop and maintain test frameworks for NIC performance and functionality testing. Troubleshoot and resolve complex technical issues related to NIC development and deployment. Experience: At least 6+ years of experience in NIC development, device driver development, and networking protocols. Experience in cloud and virtualization technologies is a plus. Required Skills: Proficiency in C, C++, and Python programming languages. Understanding of high-performance multi-core CPU/processor architecture. Domain expertise in high-speed L2/L3 protocols (e.g., Gigabit ETH, RDMA, and RoCE). In-depth knowledge of networking protocols, including TCP/IP, IPv4, and IPv6. Hands-on network device driver development for various operating systems, including Linux. Nice to Have: Python scripting for test log analysis and NIC behavior triage. Experience with machine learning and deep learning frameworks, such as TensorFlow and PyTorch.

Your Opportunity As an HPC Architect , you will get the opportunity to architect high-performance computing solutions from scratch and design/ optimize all aspects (Compute , Memory, Network ing , Storage) for better cost of Ownership. Roles and Responsibility As an architect, you will be responsible fordesigning HPC infrastructure solutions, including compute, networking, storage, and workload management components. You will work closely with cross-functional teams, including Hardware, Software, product management, and business stakeholders, to understandcomputeworkload and translate theminto Platformarchitecture and designs that meet business needs. You will create and maintain detailed system architecture diagrams and specifications. You will evaluate and select appropriate hardware and software components for HPC environments You will Install, configure, and maintain HPC systems, including hardware, software, and networking components You will develop and implement automation scripts for system management and deployment. You will be a subject Matter expert to unblock dependent teams in the HPC domain. You will be expected to develop system benchmarks, profile systems to understand bottlenecks, optimize workflows and processes to improve cost of ownership. Identify and mitigate technical risks and issues throughout the HPC development life cycle. Ensure that ComputeCluster is resilient, reliable, and maintainable. You will be expected to stay abreast of the latest HPC technologies, including Hardware, Software and Networking Solutions Your primary focus will be to understand thecomputeworkload and design HPC cluster with right combination of Nodes, CPU/GPU, Memory, Interconnects and storageto have optimum performance at minimum cost of Ownership. Our Ideal Candidate Someone who has the drive and passion to learn quickly , has the ability to multi- task and switch contexts based on business needs . Qualifications In-depth experience with Linux System administration and Hardware/Software Configuration. Strong knowledge of HPC technologies including cluster computing, high speed interconnects (InfiniBand, RoCE), parallel filesystems (Lustre, GPFS, BeeGFSetc) Experience in creating, maintaining Operating System images with different installation and boot schemes Extremely good with automation tools like Ansible, Chef, Salt-Stack and Scripting languages (Python and Bash) Experience in Creating,maintaining Storage Solutions with different RAID configuration. Ability to design storage solution for different IOPS, Access patterns (Random vs Sequential RW) and tune storage and filesystemsfor better performance. Good of knowledgeNetworking concepts including IP addressing, routing, protocols and Switch configuration for RDMA, VLAN configuration, network bonding etc. Good Knowledge Virtualization, Hardware and Software Hypervisors Good knowledge of containerization technologies like docker, singularity. Experience in Software Defined Networking and Storage. Experience in setting-up remote management protocols like IPMI, Redfish etc. Experience in setting-up and using monitoring systems like Prometheus, Grafana. Experience System profiling and custom tuningfor targetworkloadfor higher performance and low cost of ownership Very good written and verbal communication skills. Very goodinTechnical documentation meant to serve as manuals for non-experts in the field. Additional Qualifications: Experience in HPC Cluster management and Work-load orchestration software (e.g.SLURM, Torque, LSF) Experience in Setting-up Deep-learning training/inference solutions. Experience in Private cloud infrastructure like Kubernetes, OpenStack,CloudStack etc. Experience in DistributedHigh Performance Computing and Parallel programming frameworks Good knowledge of Low-latency and high-throughput data transfer technologies(RDMA on RoCE, InfiniBand) Education : Bachelor's Degree or higher in Computer science or related Disciplines.

Skillset: DV | System Verilog | UVM | Protocol Expertise Must-Have Skills: Strong expertise in System Verilog (SV) and UVM Proven experience in Test Bench Development Deep protocol knowledge in at least one of the following: PCIe / UCIe / CXL / NVM AXI / ACE / CHI Ethernet / RoCE / RDMA DDR / LPDDR / HBM Key Responsibilities : Lead and drive verification for block, subsystem, or SoC level designs Strong experience in IP/subsystem/SoC verification using SV/UVM Verification experience with ARM or RISC-V CPU based subsystems Work with C/Assembly for low-level testing Perform Power Aware Simulations using UPF Location : Bangalore | Hyderabad | Cochin | Pune

Bachelor's degree in Computer Science with 10+ years of experience with HPC environments Experience in HPC architecture and design, with a proven track record of delivering complex HPC solutions. Experience in designing and implementing HPC solutions on public cloud, private cloud, and on-premises infrastructure. Knowledge of HPC technologies, including M PI, OpenMP, Infiniband, GPFS, Lustre , and other file systems, cluster management tools such as Slurm , Torque, or LSF, and scheduling software such as PBSPro. Excellent communication skills, including the ability to communicate technical concepts to both technical and non-technical audiences. Experience with virtualization and containerization technologies such as Docker, Kubernetes, and Singularity. Strong understanding of networking technologies and protocols, including TCP/IP, Infiniband, and RDMA. Familiarity with one or more programming languages such as C, C++, Fortran, Python, or Java. Experience working in a multi-vendor, multi-cloud environment. Strong problem-solving skills and the ability to work under pressure in a fast-paced environment. Suitable candidates may forward their updated profiles in strict confidence to hr33@hectorandstreak.com or call on 9699224920

ASIC Design Verification Engineer || UVM/System Verilog || Test benches || Exp 4 to 7 years Meet the Team The Common Hardware Group (CHG) delivers the silicon, optics, and hardware platforms for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers, the Public Sector, and Non-Profit Organizations across the world. Cisco Silicon One (#CiscoSiliconOne) is the only unifying silicon architecture in the market that enables customers to deploy the best-of-breed silicon from Top of Rack (TOR) switches all the way through web scale data centers and across service provider, enterprise networks, and data centers with a fully unified routing and switching portfolio. Come join us and take part in shaping Cisco's ground-breaking solutions by designing, developing and testing some of the most complex ASICs being developed in the industry. Who You'll Work With You will engage in dynamic collaboration with verification engineers, designers, and cross-functional teams, working together to ensure the successful verification of the ASIC throughout its lifecycle. Your Impact You will contribute to developing Ciscos revolutionary data center solutions by designing industry-leading complex chips, with full exposure to all aspects of our systems and applications, including silicon, hardware, software, telemetry, and security. Specific responsibilities include: Architect block, cluster and top-level DV environment infrastructure. Develop DV infrastructure from scratch for block and cluster level environments. Maintain and enhance existing DV environments. Develop test plans and tests for qualifying design at block, and cluster level environments with mix of constraint random and directed stimulus. Ensure complete verification coverage through implementation and review of code and functional coverage. Ensure RTL quality with qualifying the design with Gate Level Simulations on netlist. Collaborate closely with designers, architects, and software teams to address and debug issues during post-silicon bring-up, ensuring seamless integration and optimal performance. Support testing of design in emulation. Minimum Qualifications Bachelors Degree in EE, CE, or other related fi eld. 5+ years of related ASIC design verification experience. Proficient in ASIC verification using UVM/System Verilog. Proficient in verifying complex blocks and/or clusters for ASIC. Experience building test benches from scratch, hands on experience with SystemVerilog constraints, structures and classes. Scripting experience with Perl and/or Python. Preferred Qualifications Experience with Forwarding logic/Parsers/P4. Experience with Veloce/Palladium/Zebu/HAPS. Formal verification (iev/vc formal) knowledge. Domain experience on one or more protocols (PCIe, Ethernet, RDMA, TCP).

Principal IP/RTL Design Engineer for Ethernet Switch Bangalore / Hyderabad Founded by highly respected Silicon Valley veterans - with its design centers established in Santa Clara, California. / Hyderabad/ Bangalore Position Overview IP/RTL Design Engineer for Ethernet Switch Position Overview We are seeking an experienced IP/RTL Design Engineer with over 10 years of experience to join our team in designing and developing intellectual property (IP) and RTL for Ethernet switches tailored for AI datacenter backend networks. The ideal candidate will have a strong background in digital design, ASIC/FPGA development, Ethernet protocols, and experience with high-performance interconnect protocols such as InfiniBand, NVLink, Infinity Fabric, with a focus on delivering high-performance, low-latency solutions for large-scale AI workloads. Key Responsibilities Design and optimize IP blocks (MAC, PCS, packet processors) for Ethernet switches. Develop synthesizable RTL (Verilog/SystemVerilog) meeting performance and timing goals. Optimize designs for low latency, high throughput, and power efficiency. Implement Ethernet protocols (IEEE 802.3, 100G/400G/800G), ECMP, and congestion control. Apply knowledge of InfiniBand, NVLink, or similar protocols for feature implementation. Use P4 or related languages for programmable packet processing. Collaborate with teams for synthesis, timing closure, and IP integration. Document designs and stay updated on AI networking trends. Required Qualifications Education: BS/MS/PhD in Electrical or Computer Engineering. Technical Skills: Proficient in Verilog/SystemVerilog for design. Knowledge of Ethernet (IEEE 802.3, 100G/400G/800G), ECMP, and congestion control. Experience with InfiniBand, NVLink, or similar protocols. Proficiency in P4 or programmable data plane languages. Knowledge of UALink, Ultra Ethernet, or RDMA/RoCE. Familiarity with power optimization or SDN. Familiarity with synthesis (e.g., Synopsys Design Compiler) and timing tools. Soft Skills: Strong problem-solving, communication, and teamwork skills. What is in it for you? Pure play product work environment Chance to work with a tightly knit group of exceptional engineers who come from the top companies of the Semiconductor world Our pay comprehensively beats "ALL" Semiconductor product players in the Indian market. A meritocracy first work place where each peer is a star A chance to be a part of industry shaping product in entirety (not bits and pieces) from initial stages A chance to work at a startup which already has customers and investor lined up for their product pipeline (We do not have a marketing/sales team, because we do not need them). A chance to learn from industry veterans who have already launched multiple Billion Dollar Semiconductor firms over the last 3 decades. Contact: Uday Mulya Technologies muday_bhaskar@yahoo.com "Mining The Knowledge Community"