7 - 12 years
6 - 10 Lacs
Posted:10 hours ago|
Platform:
Work from Office
Full Time
Domain : RTL FPGA SoC ASIC Design Must-Have Skills: RTL Coding, IP Design, SoC Development, Lint, CDC, Micro-architecture Protocol experience in PCIe DDR Ethernet (any one) Exposure to I2C UART SPI protocols Tool expertise in Spyglass Lint/CDC Synopsys DC Verdi Xcellium (any one)Scripting with Makeflow, Perl, Shell, Python (any one) Good to Have: Knowledge of ARM debug architecture Ability to debug across multiple subsystems Experience creating/reviewing design documentation Ability to collaborate with Physical Design, DFT, SW, and Verification teams Role Insights: Expertise in SoC Subsystem IP Design Deep understanding of RTL Quality Checks (Lint, CDC) Familiarity with Low Power Design & Synthesis Strong grasp of AMBA protocols (AXI, AHB, ATB, APB) Proficiency with multiple design & verification tools Effective communicator across multi-disciplinary teams Location : Bangalore | Hyderabad | Cochin | Pune
Deori Recruiterhub Solutions (opc)
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