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Cozzera
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Design Verification Engineer

Design Verification Engineer

Cozzera

4 years

0 Lacs

noida uttar pradesh india

Posted:21 hours ago| Platform:

Apply

Skills Required

design verification engineering test planning systemverilog architecture drive simulation debugging automation communication

Work Mode

Remote

Job Type

Full Time

Job Description

Position:

Experience:

Location:

About the Role

top-tier Design Verification Engineers

Key Responsibilities

Own and execute
full-chip verification
activities.
Develop and maintain
SystemVerilog/UVM or Specman/E
testbenches.
Create verification environments, components, and reusable libraries.
Perform
test planning, coverage analysis
, and debug RTL with designers.
Work collaboratively with design and architecture teams to ensure functional correctness.
Drive verification closure with high coverage and quality standards.

Requirements

4+ years of hands-on
chip or SoC verification
experience.
Strong expertise in
SystemVerilog/UVM
or
Specman/e
.
Deep understanding of
RTL design and simulation tools
.
Proven experience in
debugging complex SoCs
.
Solid grasp of
functional coverage, assertions, and constrained random testing
.

Preferred Skills

Experience with
large SoC or ASIC full-chip environments
.
Exposure to
verification automation frameworks
.
Excellent analytical, debugging, and communication skills.

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