Posted:1 day ago|
Platform:
On-site
Full Time
Design verification Engineer/Leads
Exp-3+years -12+ years
Location-Bangalore /Noida /Hyderabad/Malaysia
We are looking for a skilled Design Verification Engineer to join our semiconductor engineering team. You will be responsible for verifying complex SoCs/IPs by developing testbenches, writing test cases, and ensuring functional correctness. The ideal candidate should have strong expertise in SystemVerilog, UVM methodology, and protocol verification.
Required Skills & Qualifications:
• Bachelor’s or Master’s in Electronics/Electrical/Computer Engineering or related field.
• Solid understanding of digital design concepts, RTL, and SoC architecture.
• Strong expertise in SystemVerilog, UVM, Assertions (SVA), and functional coverage.
• Experience in verifying industry-standard protocols (PCIe/USB/DDR/Ethernet/AMBA/HBM etc.).
• Proficiency in simulation tools (Synopsys VCS, Cadence Xcelium, Mentor Questa, etc.).
• Good understanding of verification methodologies, debug tools, and scripting languages (Perl/Python/Tcl).
• Excellent problem-solving skills, teamwork, and communication.
Good to Have:
• Experience with formal verification, emulation.
• Exposure to low-power verification and power-aware simulation.
• Knowledge of C/C++ for verification or co-simulation environments.
AndGate Informatics Pvt. Ltd.
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