Key Responsibilities: Design and Developmentof analog integrated circuits (IC) for various applications such as power management, data converters, amplifiers, sensors, and mixed-signal circuits. Schematic Design and Simulation: Develop schematic designs and run simulations using industry-standard tools like Cadence, SPICE, or Synopsys to ensure functionality, performance, and compliance with specifications. Circuit Layout Supervision: Collaborate with layout engineers to ensure the designed circuits are translated to layout while meeting area, performance, and manufacturability constraints. Characterization and Debugging: Work on lab characterization, silicon validation, and debugging of ICs to meet product specifications. Technology Interaction: Understand and work with various semiconductor technologies like CMOS, BiCMOS, or GaN to optimize the analog design for performance, cost, and reliability. Design Reviews: Participate in cross-functional design reviews to provide technical insights and ensure that designs meet quality standards. Documentation: Maintain accurate documentation of design flows, methodology, and results. Customer Collaboration: Work with internal and external customers to define design requirements and specifications. Required Skills and Qualifications: Educational Qualification: B.E./B.Tech/M.E./M.Tech in Electronics, Electrical Engineering, VLSI Design, or related field. Analog Design Expertise: Solid experience in designing analog IC circuits (4-8 years). Tool Proficiency: Expertise with EDA tools such as Cadence Virtuoso, Spectre, and SPICE simulation tools. Circuit Types: Hands-on experience with designing analog blocks like op-amps, ADCs/DACs, LDOs, PLLs, filters, etc. Experience in Tape-Out: At least one successful tape-out experience in a leading role. Technology Nodes: Experience with various technology nodes (e.g., 28nm, 45nm, 65nm). Problem Solving: Strong analytical and problem-solving skills in analog circuit design. Teamwork: Ability to work in a collaborative environment and coordinate with cross-functional teams. Communication Skills: Strong written and verbal communication to interact with global teams. Desired Qualifications: Post-silicon Validation: Experience with post-silicon validation and debugging. Mixed-Signal Design: Knowledge of mixed-signal design methodology. Low Power Design: Experience in low-power and high-performance circuit design. Benefits: Competitive compensation package. Health and wellness benefits. Opportunity to work with cutting-edge semiconductor technology. Growth opportunities in a fast-paced, global environment.

Job Summary Position: Post Silicon Validation Engineer Location: Bangalore Experience: 3 to 5 Years Areas of Responsibility: Experience in pre and post silicon functional validation at IP level and SoC level Good understanding of Board level Hardware Schematics Strong in C and Embedded C programming Experience on 32-bit and 64-bit Microcontrollers and microprocessors ARM based SoCs. Understanding of communication protocols like I2C, SPI, UART Key Skills: C, Embedded C, Windows, Linux, GitHub, Bitbucket, Trace 32, WINDBG, Lauterbach, Logic Analyzer, Protocol Analyzer, JTAG, Oscilloscope , I2C,SPI,UART Experience: 3 to 5 years of experience: Understand the ARM architecture and Strong C & Embedded C coding and debugging skills is must Experience in pre and post silicon functional validation at IP level and SoC level Good exposure on IP level validation and debug on I2C, SPI, UART communication protocols Good understanding and experience on Windows and Linux operating system Knowledge and experience on JTAG, Trace32, Logical Analyzer, Protocol analyzer, Lauterbach etc debug tools Understand the product related specs and design test plan for validation IP's Understand the deltas from baseline project for developing the test cases/test plan and driver Experience in usage of Bug tracking and reporting tool like JIRA and GIT

Development and support of ASIC tech files and development of ASIC flows/methodologies. Enabling RTL2GDSII tools for placement/routing and Timing to support new foundry nodes. Physical designs (RTL to GDSII) of test vehicles to evaluate developed tech file and RTL2GDSII flow/methodology. Regular Interaction with customer during techfile and flow development. Timely tracking of issues and resolving customer support issues. Debug the complex design issues and help the design and CAD teams in PDK and flow deployments. BTech/BE/MTech/ME/MSc in Electronics/Computer science with Industry experience in ASIC PDK kit/Physical design/ ASIC Design automation role. Hands-on experience with Synopsys and Cadence Place and Route tools, Timing tools, Floor planning, IR Drop and Physical verification. Should have good understanding of Verilog/VHDL. Exposure to low power techniques and PPA analysis is desired. Knowledge of tcl and perl scripting is a must. Strong presentation and communication skills within an international environment.

Technical Skillset Required: Candidate will be responsible for validation of Bluetooth chipsets and stack on Qualcomm Extended Reality Platforms. Skillset Required: Candidate needs to have hands on experience on Bluetooth validation with proficiency in Bluetooth log analysis as well. Candidate needs to have high aptitude skills with quick problem-solving Techniques. The project involves tight deadlines and hence ramp-up on Qualcomm platform need to be very quick. Candidates with prior work exposure to Meta products will have an added advantage. Comments for Suppliers: Engineers with prior blue-tooth test/validation experience along with long analysis are required. Disclaimer: At Tessolve, we are committed to fostering a workplace that embraces and celebrates diversity in all its forms. We believe that diverse teams drive innovation, creativity, and success. We are dedicated to creating an inclusive environment where all employees, regardless of their race, color, religion, gender, gender identity or expression, sexual orientation, national origin, genetics, disability, age, or veteran status, feel valued and respected. We believe in fair and equitable treatment for all employees and aim to eliminate any biases or barriers that may hinder personal or professional growth.

Job Description: Tessolve is looking for an experienced Physical Design Engineer to join our team in Bangalore. The ideal candidate will have a strong background in RTL to GDSII implementation, expertise in advanced process nodes, and hands-on experience with industry-standard tools for floor planning, placement, clock tree synthesis (CTS), routing, timing closure, and physical verification. Key Responsibilities: End-to-end physical design flow from RTL to GDSII at advanced technology nodes (7nm, 5nm, or below). Floor planning and Partitioning: Optimize chip area, power, and performance. Placement and CTS: Optimize standard cell placement, buffer insertion, and clock tree synthesis. Routing and Timing Closure: Work on congestion analysis, RC extraction, and static timing analysis (STA). Power Optimization: Implement low-power techniques such as clock gating, power gating, and multi-voltage domains. Physical Verification: Perform DRC, LVS, and Antenna checks using industry-standard tools. Sign-off Analysis: Work on IR drop, Electro migration (EM), and Signal Integrity (SI) analysis. Collaborate with RTL design, DFT, and verification teams for design convergence. Debug and resolve timing, power, and physical verification issues. Required Skills: 4 to 8 years of experience in Physical Design and Implementation. Strong knowledge of EDA tools (Synopsys ICC2/Fusion Compiler, Cadence Innovus, or Mentor Olympus). Experience in floor planning, power planning, placement, routing, and timing closure. Expertise in Static Timing Analysis (STA) using Primetime or Tempus. Hands-on experience in physical verification tools (Calibre, PVS, or Pegasus). Good understanding of design constraints, clock tree optimization, IR drop, and power integrity. Experience with scripting (Tcl, Perl, Python) for automation is a plus. Strong problem-solving skills and ability to work in a fast-paced environment. Preferred Qualifications: Experience with 7nm, 5nm, or lower process nodes. Knowledge of low-power design methodologies. Familiarity with multi-power domain design (UPF/CPF-based flows). Why Join Tessolve Opportunity to work on cutting-edge semiconductor technology. Exposure to advanced process nodes and complex designs. Collaborative and innovative work environment. Competitive salary and benefits.

Your main responsibilities include but are not limited to: Develop firmware infrastructure/libraries and innovative cost-effective firmware solutions to meet all the product quality, test cost, manufacturing yield, and debug / diagnosability requirements. Work closely with architecture/design, firmware/software, verification and characterization, and test development teams to debug any firmware related issues on simulation/bench/ATE (Automatic Test Equipment) to root cause the problem within short TAT, to ensure timely delivery of robust firmware solutions to meet the product release schedule Job Requirements: A Bachelor/Master's Degree in Electrical/Computer Engineering/IC Design or equivalent with 3 to 5 years of experience in Embedded Software development. Extensive C programming and debugging experiences in the embedded domain for processor/microcontroller-based applications, with solid knowledge of Data structures and Algorithms. Comfortable in Linux environment and familiar with Shell/Python/Perl scripting languages. Experience in digital design and bare metal firmware development using FPGAs will have added advantage, and good knowledge of AXI/APB protocols is a plus. Understanding of the AMD FPGA products and the system development process is an advantage. Knowledge of Verilog RTL design and HW functional verification is also a plus. Strong analytical and problem-solving ability, good organizational skills with ability to multi-task, prioritize and track many activities. Good interpersonal and communication skills, and able to work well in a team environment that spans across continent.

Job SummaryTitle/Position: Sr. Software Engineer 2 Experience: 6 to 8 years Position : 1 Location: Bangalore , India About us: Tessolve Semiconductors, a venture of Hero Electronix, is a Design and Test Engineering Service Company providing End to End Solutions from Product Engineering, Software, Hardware, Wireless, Automotive and Embedded Solutions. Tessolve offers a unique combination of pre-silicon and post-silicon expertise to provide an efficient turnkey solution for silicon bring-up, spec to the product. With 3500+ employees worldwide, Tessolve provides a one-stop-shop solution with full-fledged hardware and software capabilities, including its advanced silicon and system testing labs. Tessolve offers a Turnkey ASIC Solution, from design to packaged parts. We have a global presence with office locations in the United States, India, Singapore, Malaysia, Germany, United Kingdom, China, UK, Japan, Thailand, Philippines, and Test Labs in India, Singapore, Malaysia, Austin, San Jose. Job Description : We are looking for a skilled Android Test Engineer to ensure the quality and stability of our Android applications and devices. The role involves performing functional, regression, performance, and security testing, including sanity, stress, battery, and stability tests using automation tools. You will be responsible for executing test cases, analyzing results, reporting defects using DTS, and collaborating with developers to resolve issues. The role also includes managing software upgrades/downgrades via multiple methods, including MDMs like AirWatch, SOTI, and StageNow. Additionally, you will prepare reports, conduct audits, and provide regular updates to senior management. Experience with mobile device testing, automation, and defect tracking tools is essential.

Position: Design Lead- DFT Experience: 7+ relevant experience. Location -India Education: B.Tech/M.Tech To be successful in this role you will: Seeking highly motivated, energetic, team-oriented Individual contributors willing to take the challenge of delivering of complex IPs using the latest advance Designfor Testskillsand Tools . Technical Skillset Required: Good knowledge in DFT Skills Sound knowledge in DFT Architecture and hands on in Scan , ATPG , Simulation & GLS . Prior experience in Synsopsys or Cadence or Mentor toolsLike Tetramax, Modus ,Tessentand DC tools Hands on in MBIST insertion and simulation Knowledgeon JTAG is an added advantage . Good Simulation debugging skills Technical Documentation: uArchitecture Specification, SoC Integration Specification Good exposure to Scripting skills like Perl or Python or Shell or TCL .

Technical Skillset Required: 1. Embedded 2. Should have knowledge about the Hardware IP for SSD controllers 3. Firmware development and IP Specific unit test cases. Disclaimer: At Tessolve, we are committed to fostering a workplace that embraces and celebrates diversity in all its forms. We believe that diverse teams drive innovation, creativity, and success. We are dedicated to creating aninclusive environment where all employees, regardless of their race, color, religion, gender, gender identity or expression, sexual orientation, national origin, genetics, disability, age, or veteran status, feel valued and respected. We believe in fair and equitable treatment for all employees and aim to eliminate any biases or barriers that may hinder personal or professional growth.

Areas of Responsibility: Architect, Design and Development of Firmware Components. Identifying and understanding firmware requirements and defining features and functionality Engaging in all phases of new product development, including concept, architecture, documentation and design, prototype Complete design and development cycle from Conceptualization, detailed design, Models and design calculations Evaluating firmware and system architectures, designs, implementation and assess system performance Mentoring FW engineering teams in design and development of solutions To be connected with current developments, competition, standards and Represent in standard bodies as necessary Key Skills: C, Python, ARM, Firmware, Linux, FPGA, GIT,SVN, High speed IP's, AUDIOSS,ADC, Oscilloscope, DMM, Logic Analyzer and Protocol Analyzer,VT, I2C, SPI, USB Experience: 4 to 7 years of experience Experience in Programming Languages like C, Embedded C, Python Language Need to be able to understand spec requirements and convert it into exhaustive test list. Tuning Delta from Design Documentation into Validation Test Plan and Executing the test as per test plan. Strong knowledge of structured code development methods and debug techniques. Strong understanding of ARM architecture . Good understanding of Hardware Schematics. Need to have good understanding of JEDEC spec. Effectively communicated with Design Engineers, Micro Architects and Team Members to ensure High Quality Test Plans. Excellent capability to design and deploy efficient algorithms in firmware. In-depth understanding of firmware development processes/cycles. Knowledge on protocols like AUDIOSS(Audio Subsystem), Communication IP's,High speed protocols. Experience in usage of software tools like visual studio, beyond compare. Experience in usage of Debugging tools like GHS,IAR Systems. Experience in usage of Bug tracking and reporting tool like JIRA. Extensively used version controller tool GIT and SVN. Utilizing various Software and Hardware tools like Oscilloscope, DMM, Logic Analyzer and Protocol Analyzer,VT system to ensure high quality results. Good experience in ARM exceptions , stack, registers and instruction sets. Good exposure to working with simulations,palladium, FPGA environments, debug techniques. Strong communication skills for effective collaboration with cross-functional teams.

Job Summary Position- 2 Location- Bangalore Job Description: Development and support of ASIC tech files and development of ASIC flows/methodologies. Enabling RTL2GDSII tools for placement/routing and Timing to support new foundry nodes. Physical designs (RTL to GDSII) of test vehicles to evaluate developed tech file and RTL2GDSII flow/methodology. Regular Interaction with customer during techfile and flow development. Timely tracking of issues and resolving customer support issues. Debug the complex design issues and help the design and CAD teams in PDK and flow deployments. BTech/BE/MTech/ME/MSc in Electronics/Computer science with Industry experience in ASIC PDK kit/Physical design/ ASIC Design automation role. Hands-on experience with Synopsys and Cadence Place and Route tools, Timing tools, Floor planning, IR Drop and Physical verification. Should have good understanding of Verilog/VHDL. Exposure to low power techniques and PPA analysis is desired. Knowledge of tcl and perl scripting is a must. Strong presentation and communication skills within an international environment.

Position:Sr. Design Engineer 2- DFT Experience: 6+ relevant experience. Location -India Education: B.Tech/M.Tech To be successful in this role you will: Seeking highly motivated, energetic, team-oriented Individual contributors willing to take the challenge of delivering of complex IPs using the latest advance Designfor Testskillsand Tools . Technical Skillset Required: Good knowledge in DFT Skills Sound knowledge in DFT Architecture and hands on in Scan , ATPG , Simulation & GLS . Prior experience in Synsopsys or Cadence or Mentor toolsLike Tetramax, Modus ,Tessentand DC tools Hands on in MBIST insertion and simulation Knowledgeon JTAG is an added advantage . Good Simulation debugging skills Technical Documentation: uArchitecture Specification, SoC Integration Specification Good exposure to Scripting skills like Perl or Python or Shell or TCL .

Key Responsibilities: Responsible & accountable for engineering execution and deliveries for customer projects across globe Work proactively with different stake holders in the organization for successful execution and project reporting Mentor the teams growth & create a conducive environment in the BU for their success. Support sales team in customer facing activities, proposal preparation to win business Key Skills: Proven experience in board design through full development life cycle and configuration management for managing associated documentation (BOMs, schematics, drawings, etc.) Hands-on experience on test & measurement equipment like oscilloscopes, multi-meters, power supplies Familiar with the Power, Mixed-Signal systems, Digital interfaces, and related HW design methodologies. Strong board design skills with experience in Mixed-Signal systems, High-speed serial interfaces(PCIe,SERDES,10G Ethernet), microprocessor subsystems, FPGA-based design and power distribution design concepts. Solid hands-on experience in Schematic capture tools like Altium and OrCAD Capture. Familiarity with PCB CAD Layout tools like Allegro Knowledge to understand SI-PI simulations is required Strong knowledge in board debugging Able to communicate clearly, organize effectively, and document work thoroughly while working with local and on-site teams. Familiar with the typical data and control interfaces. Examples include UART, USB, SPI, I2C, Ethernet, SDIO, PCIe, etc. Experience: 5-8 years Location: Electronic City, Bengaluru, Karnataka , India (TESIN-EC) Employee Type: Regular Employee - Probation

FPGA & AI Model Integration: Experience with PyTorch, LLM on SoC, and AI acceleration on FPGA. RTL Development & Optimization: Proficiency in MATLAB, C, Python, GO and FEC. Parallel Computing & Memory Management: Expertise in POSIX threads, SMP (Shared Memory Processor) architecture, and efficient memory operations. Board Support & System Software: Development of AI + BSP for FPGA and embedded systems. Hardware & System-Level Integration: Hands-on experience with PCIe link layer modifications, AMD PHY integration, and Xilinx Versal boards. Roles & Responsibilities Implement and optimize AI models on FPGA and SoC, ensuring seamless performance. Develop AI software + BSP and ensure efficient hardware acceleration. Lead Xilinx Versal Premium board design and optimize boot-up sequences. Design and integrate SMP architecture for efficient parallel processing. Utilize POSIX threads and FEC techniques to improve system performance. Develop multi-board rack systems, ensuring high scalability and resource efficiency. Disclaimer: At Tessolve, we are committed to fostering a workplace that embraces and celebrates diversity in all its forms. We believe that diverse teams drive innovation, creativity, and success. We are dedicated to creating aninclusive environment where all employees, regardless of their race, color, religion, gender, gender identity or expression, sexual orientation, national origin, genetics, disability, age, or veteran status, feel valued and respected. We believe in fair and equitable treatment for all employees and aim to eliminate any biases or barriers that may hinder personal or professional growth.

Job Summary Job Title: Software Developer CSSE-CSG-Debug Tools Experience: 10 -14 Years Description: We are looking for a C++ developer responsible for building debug libraries that will interact with the hardware. Your primary responsibility will be to design and development of these libraries Required Skills: Proficiency in C and C++ programming languages. Thorough knowledge of the standard library, STL containers, and algorithms Familiarity with low-level hardware interactions Experience with hardware domain and JTAG interfaces. Strong problem-solving skills Strong debugging and troubleshooting skills. Optimize software performance and ensure reliability. Ability to work independently and as part of a team. Experience in developing libraries and applications Good in Object oriented Analysis and Design Scripting Knowledge Implementation of automated testing platforms and unit test About 10+ years of experience

Position: Sr. Design Engineer 1 Experience: 4+ relevant experience. Location -India Education: B.Tech/M.Tech To be successful in this role you will: Seeking highly motivated, energetic, team-oriented Individual contributors willing to take the challenge of delivering of complex IPs using the latest advance Designfor Testskillsand Tools . Technical Skillset Required: Good knowledge in DFT Skills Sound knowledge in DFT Architecture and hands on in Scan , ATPG , Simulation & GLS . Prior experience in Synsopsys or Cadence or Mentor toolsLike Tetramax, Modus ,Tessentand DC tools Hands on in MBIST insertion and simulation Knowledgeon JTAG is an added advantage . Good Simulation debugging skills Technical Documentation: uArchitecture Specification, SoC Integration Specification Good exposure to Scripting skills like Perl or Python or Shell or TCL .

Key Responsibilities: Work closely with Business Unit headin defining strategy for the BU Responsible & accountable forengineering execution and deliveries for customer projects across globe Work proactively with differentstake holders in the organization for successful execution and projectreporting Work proactively with HR team forhiring talented and capable engineers to fulfil the business needs Mentor the teams growth &create a conducive environment in the BU for their success Support sales team in customerfacing activities, proposal preparation to win business KeySkills: Bachelorsin Electronics Engineering is a minimum requirement Mastersin Electronics or Computer Science Engineering is an added advantage 5+years of Industry experience in the industry Languages:Embedded C with Data Structures OperatingSystem: Linux / Android / RTOS (Optional) Experiencein Android AOSP BSP development activities for Android based embedded devices Experiencein Android AOSP BSP development for Android AOSP version 12 and above Experience in embedded development: Linuxdevice driver development, integration, porting Boardbring-up activities such as programming, debugging, troubleshooting andfunctionality testing WorkingKnowledge on protocols: I2C, SPI, UART, USB, SDIO, PCIe, MIPI, I2S, Experiencein Peripheral driver development: AudioVideo, Ethernet, Sensors, GPS, LTE,Wi-FiBT, Flash

Job description- 5+ years of experience using virtual prototyping tools such as Synopsys Virtualizer, Cadence Protium, or similar. Experience in testing and validating embedded systems functionality using virtual prototypes. Strong communication skills to work collaboratively with software teams and share functional validation insights. Familiarity with basic test case development and execution for hardware/software integration. Experience in debugging and troubleshooting hardware systems in a virtualized environment. Strong understanding of embedded systems, firmware development, and system-on-chip (SoC) architecture. Proficiency in programming languages such as C or Python for testing and automation.

Key Responsibilities: Collaborate closely with the Business Unit Head to define and implement strategic goals for the BU. Be responsible for engineering execution and delivery for global customer projects, ensuring all milestones are met on time and within scope. Proactively engage with stakeholders across various departments to ensure successful project execution and timely reporting. Partner with the HR team to identify, hire, and onboard talented engineers to meet the business needs. Mentor and guide the engineering teams to foster their growth, ensuring a positive and productive work environment. Support the sales team in customer-facing activities and contribute to the preparation of proposals to secure new business opportunities. Key Skills and Qualifications: Education : Bachelor's degree in Electronics Engineering (required); Master's degree in Electronics or Computer Science Engineering (preferred). Experience : Minimum of 8 years of industry experience, preferably with a background in automotive technology or embedded systems. Technical Skills : Proficient in Linux Device Drivers , BSP (Board Support Package) development. Strong expertise in Embedded C programming and data structures. In-depth knowledge of Linux/Android/RTOS operating systems. Experience with BSP development , Linux device driver development , and activities such as board bring-up, debugging, troubleshooting, and functional testing. Familiarity with I2C , SPI , UART , USB , SDIO , Audio/Video , Ethernet , and PCIe interfaces. Practical knowledge of Yocto , kernel development , and board porting . Additional Skills : Automotive domain experience would be a significant advantage. Strong communication, leadership, and problem-solving skills. Ability to manage multiple priorities and deliver results under tight deadlines.

Strong Programming experience in Java Strong Programming experience in Android Framework Strong understanding of Android architecture components, Android Framework and Native, HIDL, AIDL, HAL, JNI, SDK and Android desserts Experience with network protocols and communication frameworks. Experience in Android App considering various screen sizes and Services development using Java/Kotlin. Proficiency in debugging andperformance optimization and performance profiling tools. Excellent problem-solving and analytical skills. Ability to work independently and as part of a team. Experience of secondary desktop, Miracast-SINK, and USB over IP technologies. Experience with Android TV development. Knowledge of media streaming and playback technologies. Experience with embedded systems and low-level hardware interactions.