Lead Engineer

1. FPGA & AI Model Integration: Experience with PyTorch, LLM on SoC, and AI acceleration on FPGA.
2. RTL Development & Optimization: Proficiency in MATLAB, C, Python, GO and FEC.
3. Parallel Computing & Memory Management: Expertise in POSIX threads, SMP (Shared Memory Processor) architecture, and efficient memory operations.
4. Board Support & System Software: Development of AI + BSP for FPGA and embedded systems.
5. Hardware & System-Level Integration: Hands-on experience with PCIe link layer modifications, AMD PHY integration, and Xilinx Versal boards.
6. Roles & Responsibilities
7. Implement and optimize AI models on FPGA and SoC, ensuring seamless performance.
8. Develop AI software + BSP and ensure efficient hardware acceleration.
9. Lead Xilinx Versal Premium board design and optimize boot-up sequences.
10. Design and integrate SMP architecture for efficient parallel processing.
11. Utilize POSIX threads and FEC techniques to improve system performance.
12. Develop multi-board rack systems, ensuring high scalability and resource efficiency.

Disclaimer:

At Tessolve, we are committed to fostering a workplace that embraces and celebrates diversity in all its forms. We believe that diverse teams drive innovation, creativity, and success. We are dedicated to creating aninclusive environment where all employees, regardless of their race, color, religion, gender, gender identity or expression, sexual orientation, national origin, genetics, disability, age, or veteran status, feel valued and respected. We believe in fair and equitable treatment for all employees and aim to eliminate any biases or barriers that may hinder personal or professional growth.