4 - 8 years
4 - 8 Lacs
Posted:10 hours ago|
Platform:
On-site
Full Time
Development and support of ASIC tech files and development of ASIC flows/methodologies. Enabling RTL2GDSII tools for placement/routing and Timing to support new foundry nodes. Physical designs (RTL to GDSII) of test vehicles to evaluate developed tech file and RTL2GDSII flow/methodology. Regular Interaction with customer during techfile and flow development. Timely tracking of issues and resolving customer support issues. Debug the complex design issues and help the design and CAD teams in PDK and flow deployments.
BTech/BE/MTech/ME/MSc in Electronics/Computer science with Industry experience in ASIC PDK kit/Physical design/ ASIC Design automation role.
Hands-on experience with Synopsys and Cadence Place and Route tools, Timing tools, Floor planning, IR Drop and Physical verification.
Should have good understanding of Verilog/VHDL.
Exposure to low power techniques and PPA analysis is desired.
Knowledge of tcl and perl scripting is a must. Strong presentation and communication skills within an international environment.
Tessolve Semiconductor Private Limited
Upload Resume
Drag or click to upload
Your data is secure with us, protected by advanced encryption.
Browse through a variety of job opportunities tailored to your skills and preferences. Filter by location, experience, salary, and more to find your perfect fit.
We have sent an OTP to your contact. Please enter it below to verify.
Instantly access job listings, apply easily, and track applications.
Bengaluru, Karnataka, India
4.0 - 8.0 Lacs P.A.
Bengaluru, Karnataka, India
4.0 - 8.0 Lacs P.A.
Bengaluru, Karnataka, India
Salary: Not disclosed
2.16 - 2.76 Lacs P.A.
Pune, Maharashtra, India
Experience: Not specified
Salary: Not disclosed
maharashtra
9e-05 - 9e-05 Lacs P.A.
Banaswadi, Bengaluru, Karnataka
Experience: Not specified
Salary: Not disclosed
Bengaluru, Karnataka, India
1.0 - 8.0 Lacs P.A.
Amarnath, Maharashtra
Experience: Not specified
0.3 - 0.5 Lacs P.A.
Salary: Not disclosed
