4 - 12 years
3 - 15 Lacs
Posted:13 hours ago|
Platform:
On-site
Full Time
IP verification Using SV/UVM
SOC Verification using C/SV
Third Party VIP Integration
Interconnect Protocols: AHB, AXI, APB
SOC Interfaces: GPIO, SPI, I2C, UART (4+)
High Speed Serial Interfaces: PCIe Gen 3/4 or USB or MIPI (7+)
Memory Interfaces: DDR or HBM I/O (10+)
Coverage Closure: Code, Functional and Toggle
Tools: Synopsys VCS or Cadence Incsive
Technical Documentation: Testbench Specification, Test Plan Specification
Foundry Porting Experience: Technology Library Conversion Related Changes Verification
Tessolve Semiconductor Private Limited
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