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Capgemini
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Design Verification Boost

Design Verification Boost

Capgemini

1 - 5 years

7 - 11 Lacs

bengaluru

Posted:1 day ago| Platform:

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Skills Required

design verification python code coverage c soc ovm ips uvm verilog scripting shell team leadership design leadership unix shell perl unix

Work Mode

Work from Office

Job Type

Full Time

Job Description

About The Role

Team LeadershipLead and manage a team of verification engineers.

Verification StrategyDefine strategies for verifying IPs and SoCs to ensure first silicon success.

Test Planning & Development:

Write test plans.

Develop test benches and test cases.

Coverage-Driven Verification:

Use industry-standard methodologies (likely UVM/SystemVerilog).

Focus on functional coverage, code coverage, and assertions..

About The Role - Grade Specific
Your Profile:

You will be part of the team verifying IPs and SoCs leading to first Si success.

Manage and lead a team of Verification engineers

IP verification is coverage driven using latest industry standard methodologies and HVLs.

Work involves defining verification strategy, writing test plans, developing efficient test benches and test cases.

Code coverage, Functional coverage and assertions are desired.

ARM based SoC verification experience is an added advantage.

Proficiency in one scripting language like Perl, C++, Python, Unix Make, Unix Shell Scripts etc. is a great plus.

Multiple positions with emphasis on AMS and Power aware verification.

Should have worked on GLS.

Primary Skills

Verilog, SV, UVM/OVM, IP Verification, SoC Verification, scripting Perl, Python, Shell, and Tcl.

Secondary Skills

Test bench / model / VIP development, Functional coverage, GLS, LEC, Emulation, AMS, ARM, Protocols AHB/AXI/APB, Ethernet, USB, PCIe, I2C, SPI, CAN, Mipi CSI/DSI, LPDDR

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Design Verification Boost