5 - 10 years

15 - 20 Lacs

Posted:3 days ago| Platform: Naukri logo

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Job Type

Full Time

Job Description

Position: STA Engineer (SI50FF RM 3414)

  • Timing analysis, validation and debug across multiple PVT conditions using Tempus.
  • Familiar with Tempus DMMMC flow for STA
  • STA setup, convergence, reviews, and signoff for scan and func.
  • Review of Unconstrained endpoints and check timing reports.
  • Proficient in STA and timing methodologies with good understanding of noise, crosstalk, and OCV effects.
  • Should have worked on both block level and full chip timing closure at lower nodes 22nm, 16nm, 5nm
  • Additionally, closely interact with designers/synthesis/PNR team to provide the feedback to ensure smooth timing closure.
  • Working proficiency with tcl, python scripting
  • Previous experience with ADI flows/ Cadence flows for STA preferred
  • Previous experience with power domain-based designs preferred.

Job Category:

Others

Job Type:

Full Time

Job Location:

Bangalore Hyderabad

Experience:

5+ years

Notice period:

0-15 days

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