Sr Design Lead

Position: Sr Design Lead (PNR)/STA

Experience: 8-12 years relevant experience.

Location Bangalore/Hyderabad

Tessolve Semiconductors a venture of Hero Electronix

We are Global Multi- National Company having Engineering and Sales presences in India, Malaysia, Singapore, USA, UK, Europe, and China. Tessolve has strategic and sustainable growth plan to ensure the business stability to our valued customers and to protect the career of our employees even under disturbed Business situations.

Technical Skillset Required:

Looking for suitable engineers with 6+ years of experience in SOC, Block Level P&R activities

Must have worked in at least 2 to 3 Full Chip tape outs.

Must be hands-on technical expert.

Experience in deep sub-micron designs (65/45/40/28/14/10nm) and associated issues (performance, power, signal integrity, physical verification, manufacturability, scaling)

Experience in leading SOC, Block Level timing closure and physical design tasks with deep technical knowledge in all stages of the design (IO Pad-ring, Power Planning, floor planning, placement, CTS, Routing, noise reduction/crosstalk, extraction, IR drop, LVS/DRC and other physical and electrical checks)

Experience in Low power and high-performance designs.

Be able manage junior team members.

Should be able to comprehend architecture, architectural limitations from Physical Design perspective, schedule, and volume of the task and personnel requirement

Tessolve

Tessolve has something unique to offer for everyone depending on their interest levels.