Define and develop SoC architecture specifications with a focus on advanced interface technologies (PCIe Gen 5/6, CXL 2.0/3.0, custom NoC solutions). Create detailed micro-architectural specifications including block diagrams, interface definitions, and performance models. Collaborate with IP teams to define and implement PCIe controllers, CXL interfaces, and custom NoC topologies. Develop performance models and conduct analysis to optimize system throughput, latency, and power consumption. Lead technical discussions with cross-functional teams including RTL designers, verification engineers, and physical design teams. Identify architectural risks and develop mitigation strategies throughout the design lifecycle. Evaluate and select third-party IP components when appropriate. Participate in industry standard committees and stay current with emerging interface technologies. At Least 8+ years of experience in SoC architecture with specific focus on high-speed interconnect technologies. Deep technical knowledge of PCIe (Gen 4/5/6) and CXL specifications and implementations. Extensive experience designing and implementing Network-on-Chip architecture. Proficiency in SystemVerilog and UVM for architecture modeling and verification. Experience with PCIe and CXL switch design, and implementation is an added advantage. Experience with CXL 2.0/3.0 implementation and memory semantics. Familiarity with emerging interface standards (UCIe, CCIX).

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SOC Architect