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Mips
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Senior Staff Design Verification Automation Engineer

Senior Staff Design Verification Automation Engineer

Mips

8 - 14 years

30 - 35 Lacs

Bengaluru

Posted:1 week ago| Platform:

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Skills Required

Design verification Automation C++ GIT System verilog MIPS JIRA UVM Python database development

Work Mode

Work from Office

Job Type

Full Time

Job Description

Design Verification Automation Engineer

Company:

MIPS

Description:

MIPS is seeking a skilled and motivated Design Verification Automation Engineer to develop advanced flows for CPU development. The candidate will build on existing modern methodologies to improve and support current infrastructure and create new solutions. They will work closely with lead developers in support of quality, efficiency, and predictability of execution through scripts, flows, and internal and third-party tools. The ideal candidate will have experience with CPU design verification development methodology and a solid background in software and flows.

Required Skills:

Python scripts and automation
C, C++
Jenkins management
Jira integration
Familiarity with git or perforce
LSF or Grid management

Supporting Experience:

Design Verification methodology
Cadence or Synopsys verification solutions
System Verilog, UVM
CPU architecture, development, and software
Database development

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Senior Staff Design Verification Automation Engineer