RTL Performance Analysis Architect

General Summary:

The candidate will be part of the Infrastructure IP Performance modelling, verification, and analysis team (Bangalore), working on performance verification and analysis.

The team in Bangalore is part of a larger global performance team responsible for the Infra IP hardware performance. Our team is engaged in all stages of architecture development, from early-stage analysis and micro-architecture research/development to power/performance correlation vs. RTL and performance tuning efforts on production hardware.

This specific role involves RTL based performance analysis and micro-architectural analysis of memory controller, last level cache and complex interconnect design for Snapdragon based SoCs including premium tier. This includes analyzing the micro-architecture to bring-out the performance bottlenecks as well as propose the design optimizations to improve it further in next generation products. The role provides an opportunity to demonstrate innovations through patents and publications.

In addition, the team also focuses on cache hierarchy, CXL, MMU, Image compression algorithms and interconnect design analysis for Qualcomm mobile systems. The team has strong and proven impact to Qualcomm mobile system architecture. The team is also contributing to Qualcomms patent portfolio through this impact work.

Responsibilities

• Characterize performance of applications and benchmarks to identify key CPU, GPU, multi-media, SMMU, CXL, NoC and cache controller performance bottlenecks w.r.t memory controller.
• Engage with architects and design teams to investigate next-generation memory controller, last level cache and interconnect microarchitecture.
• Key interest to analyze, identify and propose ways go towards the best PnP friendly design and architecture
• Develop targeted pre-silicon performance verification/analysis strategy including test plan to identify bottlenecks in the design.
• Develop simulation size workloads for pre-silicon performance analysis in SV/UVM platform.

Job Requirements

• Bachelors degree in engineering, Information Systems, Computer Science, or related field.
• Excellent foundation in computer architecture, microarchitecture and strong analytical thinking
• 4-8 years of experience in design/performance analysis/functional verification
• Experience in digital design/micro-architecture experience is an added advantage for this role.
• Knowledge of Memory Controller, LPDDR & DDR protocols, CXL, MMU, Graphic pipeline is a plus.
• Experience with performance analysis and driving microarchitecture investigations on blocks like memory controller, CPU, GPU, NoC an multi-media.
• Strong design analysis skills to identify performance bottlenecks in the system.

Desirable skills and experience

• Knowledge of AMBA and ARM architecture-based systems
• Understanding of system performance use cases or relevant background
• Right attitude to work in a highly competitive team

Minimum Qualifications: