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RTL Integration

0 - 10 years

0 Lacs

Bengaluru Karnataka

Posted:1 month ago| Platform: Indeed logo

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Skills Required

integration graphics cutting design architecture ip subsystems checks power support verification synthesis constraints timing analysis dft verilog logic simulation management data

Work Mode

On-site

Job Type

Full Time

Job Description

Job Information

    Job Opening ID

    ZR_126_JOB

    Industry

    Semiconductor

    Date Opened

    07/01/2025

    Job Type

    Full time

    Work Experience

    5-10 Years

    City

    Bangalore

    State/Province

    Karnataka

    Country

    India

    Zip/Postal Code

    560078
THE ROLE:
As a member of the Computing and Graphics group, you will help bring to life cutting-edge designs. As a member of the front-end design/integration team, you will work closely with architecture, IP design, Physical Design teams, and product engineers to achieve first pass silicon success.
RTL/Integration- Design Engineer
The Person:
The ideal candidate will have experience developing RTL for IP or subsystems and understand architectural specifications. Responsibilities include IP and subsystem design, integrating multiple IPs, performing quality checks and working collaboratively with the IP/SoC team.
Key Responsibilities:
  • Design of IP and subsystems with integration of AMD and other 3rd party IPs
  • Perform quality checks (lint, CDC, and power rule checks) of power-gated digital designs
  • Work collaboratively with other members of the IP team to support design verification, implementation (synthesis, constraints, static timing analysis), and delivery to SOC
  • Work in partnership with SOC teams to support the IP at SOC level, including connectivity, DFT, verification, physical design, firmware, and post-silicon bring-up
Preferred Experience:
  • 5-10 years full-time experience in IP hardware design
  • Proficiency in verilog/system verilog RTL logic design of high-speed, multi-clock digital designs
  • Verilog lint tools (Spyglass) and verilog simulation tools (VCS)
  • Clock domain crossing (CDC) tools
  • Detailed understanding of SoC design flows
  • Understanding of IP/SS/SoC Power Management techniques – Power Gating, Clock Gating
  • Experience with embedded processors and data fabric architectures (NoC)
  • Outstanding interaction skills while communicating both written and verbally
  • Ability to work with multi-level functional teams across various geographies
  • Outstanding problem-solving and analytical skills

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