Work from Office
Full Time
We are looking for an experienced DFT Engineer with strong hands-on expertise in ATPG and Scan-based test methodologies. The candidate will be responsible for implementing and validating DFT features to ensure robust test coverage and high-quality silicon delivery.
* Perform scan insertion and ensure DFT design compliance.
* Execute SCAN DRC checks and perform coverage debug for improved fault coverage.
* Generate and validate ATPG patterns for stuck-at and transition faults.
* Run gate-level simulations (Zero Delay and Timing Delay) for DFT verification.
* Work on JTAG / IEEE P1500 protocols and develop automation scripts using Perl / Tcl.
Proxelera
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