DFT Engineer

Mirafra

1 - 6 years

8 - 13 Lacs

noida bengaluru

Posted:17 hours ago| Platform:

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Skills Required

dft engineering scan architecture verilog/systemverilog tetramax mbist/lbist jtag fault models synopsys dft compiler atpg tessent bist scan test methodologies

Work Mode

Work from Office

Job Type

Full Time

Job Description

DFT (Design for Test) Engineer

Key Responsibilities:

Develop and implement DFT solutions including
Scan, ATPG, JTAG, BIST (MBIST/LBIST)
Integrate DFT features at block and chip level
Generate and validate test patterns using ATPG tools
Debug coverage issues and improve fault coverage
Collaborate with RTL, PD, and Verification teams for seamless DFT integration
Review RTL for testability and provide DFT guidelines
Support post-silicon debug and manufacturing test activities

Required Skills & Qualifications:

110 years of experience in
DFT implementation and verification
Strong understanding of
scan architecture, fault models, and test methodologies
Hands-on experience with tools such as
Synopsys DFT Compiler, TetraMAX, Tessent
Good knowledge of
Verilog/SystemVerilog
Familiarity with low-power DFT techniques and compression
Experience with SoC-level DFT is a plus

Preferred Skills:

Exposure to advanced nodes and complex SoCs
Knowledge of ATE patterns and test flows

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