1.0 - 6.0 years

8 - 13 Lacs

noida, bengaluru

Work from Office

We are looking for a highly motivated DFT (Design for Test) Engineer with 110 years of experience to join our VLSI team. The ideal candidate will have strong hands-on experience in implementing and validating DFT architectures to ensure high-quality, testable silicon designs. Key Responsibilities: Develop and implement DFT solutions including Scan, ATPG, JTAG, BIST (MBIST/LBIST) Integrate DFT features at block and chip level Generate and validate test patterns using ATPG tools Debug coverage issues and improve fault coverage Collaborate with RTL, PD, and Verification teams for seamless DFT integration Review RTL for testability and provide DFT guidelines Support post-silicon debug and manufa...

Posted 19 hours ago

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DFT Engineer Shashwath Solution

6.0 - 8.0 years

6 - 8 Lacs

Bengaluru / Bangalore, Karnataka, India

On-site

Roles and Responsibilities Develop RTL code using Verilog/VHDL Work with Mentor DfT tools and Cadence tools for design and verification Perform scan insertion, JTAG, ATPG DRC, and coverage analysis Debug simulations using timing and SDF Contribute to LBIST and Mixed Signal Radar IC-related projects (preferred) Investigate simulation failures and perform root cause analysis Collaborate with cross-functional teams; work independently and proactively Communicate effectively with both written and verbal communication

Posted 6 months ago

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ASIC DFT Engineering Technical Leader Cisco

10.0 - 15.0 years

12 - 17 Lacs

Bengaluru

Work from Office

Your Impact Responsible for implementing the Hardware Design-for-Test (DFT) features that support ATE, in-system test, debug and diagnostics needs of the designs. Responsible for development of innovative DFT IP in collaboration with the multi-functional teams, and play a key role in full chip design integration with the testability features coordinated in the RTL. Work closely with the design/design-verification and PD teams to enable the integration and validation of the Test logic in all phases of the implementation and post silicon validation flows. Your team will participate in the creation of Innovative Hardware DFT & physical design aspects for new silicon device models, bare die & st...

Posted 6 months ago

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Sr Lead Engineer - DFT Qualcomm

2.0 - 7.0 years

2 - 7 Lacs

Bengaluru / Bangalore, Karnataka, India

On-site

Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Preferred Qualifications: Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. 3+ years of Hardware Engineering or related work experience. 2+ years of experience with circuit design (e.g., ...

Posted 6 months ago

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