5.0 - 10.0 years

25 - 40 Lacs

bengaluru

Work from Office

Position: DFT Engineer Location: Bangalore Experience: 5+ Years Email: karthik.adasu@proxelera.com Job Description: We are looking for an experienced DFT Engineer with strong hands-on expertise in ATPG and Scan-based test methodologies. The candidate will be responsible for implementing and validating DFT features to ensure robust test coverage and high-quality silicon delivery. Key Responsibilities: * Perform scan insertion and ensure DFT design compliance. * Execute SCAN DRC checks and perform coverage debug for improved fault coverage. * Generate and validate ATPG patterns for stuck-at and transition faults. * Run gate-level simulations (Zero Delay and Timing Delay) for DFT verification. ...

Posted 1 month ago

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DFT - MBSIT AND ATPG Modernize Chip Solutions (MCS)

4.0 - 8.0 years

0 Lacs

karnataka

On-site

You should have a minimum of 4 years of experience in the field. You must be proficient in using Synthesis and netlist validation tools, particularly LEC and Spyglass checks, as well as scan insertion and DRC debug. It is essential to be well-versed in both Synopsys and Mentor Graphics DFT flows. Your expertise should also include experience in Scan Compression for Hierarchical and Modular EDT, ATPG, and Coverage debug, along with the ability to manage multiple clock domains and familiarity with the OCC flow. You should have practical experience in BIST and BISR insertion and Validation with SMS and MBIST Architect. Hands-on experience with JTAG, IJTAG, and SSN is required. You should be fam...

Posted 3 months ago

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