Design Verification Engineer

Proxelera

5 years

0 Lacs

hyderabad telangana india

Posted:1 day ago| Platform:

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Skills Required

design verification ip support development systemverilog test analyze interface ethernet scripting python perl automation regression

Work Mode

On-site

Job Type

Full Time

Job Description

Position: ASIC Design Verification Engineer

Location: Hyderabad

Experience: 3–5 Years

Hiring Design Verification Engineer with strong IP-level / Functional Verification experience using UVM to support high-quality IP development programs. If you enjoy solving real-world verification problems and contributing to high-quality IP delivery, this role offers an excellent opportunity to grow and make an impact.

Hands-on experience in IP-level functional verification using SystemVerilog and UVM, including testbench development and test case creation.
Perform RTL verification, debug functional issues, analyze waveforms/logs, and ensure quality IP delivery within project timelines.
Solid understanding of digital design fundamentals and industry-standard verification methodologies.
Exposure to on-chip bus and interface protocols such as AXI, AHB, and Ethernet for IP verification.
Utilize scripting languages (Python, Perl, Shell) to support verification automation, regression, and productivity improvements.

Thanks,

Karthik Kumar

karthik.adasu@Proxelera.com

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