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Capgemini
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Design Verification Engineer

Design Verification Engineer

Capgemini

3 - 6 years

5 - 9 Lacs

bengaluru

Posted:1 day ago| Platform:

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Skills Required

soc verification perl sv ovm uvm c++ usb soc design verification test cases artificial intelligence unix shell scripting axi ip verification shell scripting assertions tcl arm vip support python code coverage spi verilog ethernet pcie unix

Work Mode

Work from Office

Job Type

Full Time

Job Description

At Capgemini Engineering, the world leader in engineering services, we bring together a global team of engineers, scientists, and architects to help the worlds mostinnovative companies unleash their potential. From autonomous cars to life-saving robots, our digital and software technology experts think outside the box as theyprovide unique R&D and engineering services across all industries. Join us for a career full of opportunities. Where you can make a difference. Where no two days arethe same. About The Role
About The Role :

You will be part of the team verifying IPs and SoCs leading to first Si success.

Manage and lead a team of Verification engineers

IP verification is coverage driven using latest industry standard methodologies and HVLs.

Work involves defining verification strategy, writing test plans, developing efficient test benches and test cases.

Code coverage, Functional coverage and assertions are desired.

ARM based SoC verification experience is an added advantage.

Proficiency in one scripting language like Perl, C++, Python, Unix Make, Unix Shell Scripts etc. is a great plus.

Multiple positions with emphasis on AMS and Power aware verification.

Should have worked on GLS.

Primary
Skills:

Verilog, SV, UVM/OVM, IP Verification, SoC Verification, scripting Perl, Python, Shell, and Tcl.

Secondary
Skills:

Test bench / model / VIP development, Functional coverage, GLS, LEC, Emulation, AMS, ARM, Protocols AHB/AXI/APB, Ethernet, USB, PCIe, I2C, SPI, CAN, Mipi CSI/DSI, LPDDR.

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Design Verification Engineer