231 Compiler Jobs - Page 7

Introduction IBM Systems helps IT leaders think differently about their infrastructure. IBM servers and storage are no longer inanimate - they can understand, reason, and learn so our clients can innovate while avoiding IT issues. Our systems power the world’s most important industries and our clients are the architects of the future. Join us to help build our leading-edge technology portfolio designed for cognitive business and optimized for cloud computing. Robust background in traditional AI methodologies, encompassing both machine learning and deep learning frameworks. Proficiency in Python, C++, and relevant ML libraries (e.g., TensorFlow, PyTorch) to develop production-grade quality products is essential. Skilled in integrating, cleansing, and shaping data, with expertise in various databases including open-source databases like MongoDB, CouchDB, CockroachDB. Proficient in developing optimal data pipeline architectures for AI applications, ensuring adherence to client’s SLAs. Familiarity with Linux platform and experience in Linux app development is desirable. Experienced in DevOps, skilled in Git, CI/CD pipelines (Jenkins, Travis CI, GitLab CI), and containerization (Docker, Kubernetes). Experience in Generative AI would be a huge plus. AI compiler/runtime skills would be a huge plus. Open-source Contribution is a huge plus. Experience in contributing to open-source AI projects or utilizing open-source AI frameworks is beneficial. Strong problem-solving and analytical skills, with experience in optimizing AI algorithms for performance and scalability. Your Role And Responsibilities Utilize expertise in AI/ML and Data Science to develop and deploy AI models in production environments, ensuring scalability, reliability, and efficiency. Implement and optimize machine learning algorithms, neural networks, and statistical modelling techniques to solve complex problems. Hands-on experience in developing and deploying large language models (LLMs) in production environments, with a good understanding of distributed systems, microservice architecture, and REST APIs. Collaborate with cross-functional teams to integrate MLOps pipelines with CI/CD tools for continuous integration and deployment. Stay updated with the latest advancements in AI/ML technologies and contribute to the development and improvement of AI frameworks and libraries. Ensure compliance with industry best practices and standards in AI engineering, maintaining high standards of code quality, performance, and security. Preferred Education Bachelor's Degree Required Technical And Professional Expertise Proficiency in Python, C++. Experience with relevant ML libraries (e.g., TensorFlow, PyTorch) for developing production-grade quality products. Expertise in various databases including open-source databases like MongoDB, CouchDB, CockroachDB. Skills in Git, CI/CD pipelines (Jenkins, Travis CI, GitLab CI), and containerization (Docker, Kubernetes). Experience in contributing to open-source AI projects or utilizing open-source AI frameworks. Experience in optimizing AI algorithms for performance and scalability. Preferred Technical And Professional Experience Proven ability to implement and optimize machine learning algorithms, neural networks, and statistical modelling techniques to solve complex problems effectively. Proficiency in distributed systems, microservice architecture, and REST APIs. Experience in collaborating with cross-functional teams to integrate MLOps pipelines with CI/CD tools for continuous integration and deployment, ensuring seamless integration of AI/ML models into production workflows. Experience in using container orchestration platforms such as Kubernetes to deploy and manage machine learning models in production environments, ensuring efficient scalability and management of AI infrastructure. Proven ability to contribute to the development and improvement of AI frameworks and libraries. Strong communication skills with the ability to communicate technical concepts effectively to non-technical stakeholders. Show more Show less

Senior SoC Director / SoC Director Hyderabad Founded by highly respected Silicon Valley veterans - with its design centers established in Santa Clara, California. / Hyderabad/Bangalore A US based well-funded product-based startup looking for highly talented SoC Director for the following roles Senior Director / SoC Director of SOC is : Trust, loyalty, and ability to command Technical respect with foreign partners after having Taped out Successfully multiple chips to high volume production….this should be easily achieved under his/her belt !!!!!!!! Somebody we can trust to drive on the World stage without embarrassing us Job Description: We are seeking an experienced professional to lead full chip design for multi-million gate SoCs. The ideal candidate will have expertise in digital design and RTL development, with a deep understanding of the design convergence cycle, including architecture, micro-architecture, synthesis, timing closure, and verification. Key Responsibilities: Proficiency in Interconnect Fabric Cache Coherency D2D C2C Oversee full chip design for complex SoCs. Develop and implement digital designs (RTL). Manage IP dependencies and track all front-end design tasks. Drive project milestones across design, verification, and physical implementation phases. Qualifications: At least 15-25 years of solid experience in SoC design. Proven ability to develop architecture and micro-architecture from specifications. Familiarity with bus protocols such as AHB and AXI, as well as peripherals like QSPI, NVMe, and I3C. Knowledge of memory controller designs and microprocessors is a plus. Understanding of chip I/O design and packaging is advantageous. Experience in reviewing top-level test plans. Expertise in Synopsys Design Compiler for synthesis and formal verification. Strong working knowledge of timing closure processes. Experience with post-silicon bring-up and debugging. Familiarity with SoC integration challenges. Knowledge of design verification aspects is essential. Experience from SoC specification to GDS and commercialization is highly desired. Ability to make timely and effective decisions, even with incomplete information. Demonstrated expertise in specific technical areas, with significant experience in related fields. Provide direction, mentoring, and leadership to small to medium-sized teams. Strong communication and leadership skills are necessary for effective collaboration with program stakeholders. Contact: Uday Mulya Technologies muday_bhaskar@yahoo.com "Mining The Knowledge Community" Show more Show less

Company Qualcomm India Private Limited Job Area Engineering Group, Engineering Group > Hardware Engineering General Summary Experience in Logic design /micro-architecture / RTL coding is a must. Must have hands on experience with SoC design and integration for complex SoCs. Experience in Verilog/System-Verilog is a must. Should have knowledge of AMBA protocols - AXI, AHB, APB, SoC clocking/reset/debug architecture and peripherals like USB, PCIE and SDCC. Understanding of Memory controller designs and microprocessors is an added advantage Hands on experience in constraint development and timing closure Work closely with the SoC verification and validation teams for pre/post Silicon debug Hands on experience in Low power SoC design is required Experience in Synthesis / Understanding of timing concepts for ASIC is required. Hands on experience in Multi Clock designs, Asynchronous interface is a must. Experience creating pad ring and working with the chip level floorplan team is an added advantage Experience in using the tools in ASIC development such as Lint, CDC, Design compiler and Primetime is required. Minimum Qualifications Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. Preferred Qualifications 6-9 years of experience in SoC design Educational Requirements: 6+ years of experience with a Bachelor’s/ Master’s degree in Electrical engineering Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers. 3072635 Show more Show less

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are an experienced and highly motivated professional with a strong background in analog and mixed-signal (A&MS) layout design. You thrive in a collaborative environment and possess a keen eye for detail and design integrity. Your technical expertise in using industry-standard EDA tools, coupled with your problem-solving abilities, makes you a valuable asset to any team. You have a deep understanding of semiconductor process technologies and their impact on layout design, and you are always eager to stay updated with the latest industry trends and advancements. With exceptional communication and interpersonal skills, you work effectively in team-oriented environments and contribute positively to the collective success. What You’ll Be Doing: Collaborate with cross-functional teams to develop and implement layout designs for analog and mixed-signal (A&MS) integrated circuits. Create and optimize layout designs using industry-standard EDA tools. Perform physical verification and design rule checks to ensure design integrity and manufacturability. Participate in design reviews and provide feedback to improve design quality. Work closely with circuit designers to understand design specifications and constraints. Contribute to the development and enhancement of layout design methodologies and best practices. Stay updated with the latest industry trends and advancements in A&MS layout design. The Impact You Will Have: Enhance the reliability and performance of our PVT sensor IPs through meticulous layout design. Ensure manufacturability and integrity of designs, avoiding costly errors in production. Contribute to the development of cutting-edge technologies in the semiconductor industry. Support the continuous improvement of design methodologies and best practices. Facilitate the integration of our IPs into SOC subsystems, aiding in the creation of high-performance silicon chips. Drive the technological innovations that keep Synopsys at the forefront of the industry. What You’ll Need: Bachelor’s or master’s degree in electrical engineering or a related field. 3+ years of experience in A&MS layout design for integrated circuits. Proficiency in industry-standard EDA tools, such as Cadence Virtuoso or Synopsys Custom Compiler. Exceptional knowledge of layout design methods, techniques, and methodologies. Experience with physical verification tools, such as Calibre or Assura. Who You Are: An excellent problem-solver with systematic skills. A team player who works effectively in a collaborative environment. Detail-oriented with a strong focus on design integrity and quality. A proactive learner who stays updated with industry trends. An effective communicator with strong interpersonal skills. The Team You’ll Be A Part Of: You will be part of the rapidly expanding PVT IP group, which focuses on developing custom layout designs for Process, Voltage, Temperature, Current, and Droop sensors. Our team is dedicated to creating high-quality IPs that are integral to the Silicon lifecycle monitoring, ensuring the success and reliability of complex SOC subsystems. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. Show more Show less

Alternate Job Titles: ASIC Design Engineer Digital Design Engineer Senior ASIC Engineer We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. PVT Sensor IP development is a critical offering for process, voltage, temperature, and other monitoring IPs within SOC subsystem. Synopsys is a market leader for these IP developments which are integral parts of Silicon lifecycle monitoring. You Are: As a new, exciting, and challenging position, we are looking for a talented person that can show a great level of initiative and ability to work in a busy and fast-changing environment. This rewarding role is fundamental to the successful and smooth operation of the engineering teams. You will play a vital role in helping to strengthen and develop forecasting capabilities, based upon improved monitoring capacity and forward-looking project schedules. You will generate test benches and test cases, perform RTL and gate-level SDF-annotated simulations and debug, and may perform mixed-signal (digital + analog) simulations and debug. You will interact with our application engineers and provide guidance to customers. Additionally, you will participate in the generation of data books, application notes, and white papers. What You’ll Be Doing: Generate test benches and test cases. Perform RTL and gate-level SDF-annotated simulations and debug. May perform mixed-signal (digital + analog) simulations and debug. Interact with our application engineers and provide guidance to customers. Participate in the generation of data books, application notes, and white papers. Perform physical verification and design rule checks to ensure design integrity and manufacturability. Understand tools like VC Spyglass, Verdi, & views like SDF, Liberty, etc., and other frontend views. Write RTL Code, with solid Verilog, PERL, and Python skills, and TCL is a good addition. Understand static timing analysis and synthesis, DFT/ATPG skills would be a plus. Knowledge of any high-speed communication protocol is not mandatory but an asset. Previous knowledge in customer support and/or silicon bring-up is a plus. The Impact You Will Have: Strengthen and develop forecasting capabilities based on improved monitoring capacity. Ensure high-quality and reliable silicon lifecycle monitoring solutions. Enhance quality assurance methodology by adding more quality checks/gatings. Support internal tools development and automation to improve productivity across ASIC design cycles. Work with design engineers on new tools/technology and new features evaluation and adoption. Contribute to the successful and smooth operation of the engineering teams. What You’ll Need: Bachelor’s or master’s degree in electrical engineering or a related field. 3 to 7+ years of experience in A&MS frontend and backend views & collaterals development flows. Proficiency in industry-standard EDA tools, such as Cadence Virtuoso or Synopsys Custom Compiler. Exceptional knowledge of layout design methods, techniques, and methodologies. Experience with physical verification tools, such as Calibre or Assura. Understanding of semiconductor process technologies and their impact on layout design. Who You Are: Excellent problem-solving and systematic skills. Ability to work effectively in a team-oriented environment. Familiarity with Synopsys Tool set (such as FC/ICC2, Primetime, Formality, ICV). Good communication and interpersonal skills. The Team You’ll Be A Part Of: You will be part of a dynamic team focused on developing cutting-edge PVT Sensor IPs integral to Silicon lifecycle monitoring. This team collaborates closely with other engineering teams to ensure the highest quality and performance of our products. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. Show more Show less

Permanent work from home is offered *Candidates who are well versed with French Language *Outstanding verbal & listening skills in English is must *Freshers are welcomed *Salary upto 10Lac PA *Rotational shifts *2 week offs Barkha @ 8851644223 Required Candidate profile Need only B2 Certified candidates *Any dropout/12th pass/UG & Graduate (Fresher & experienced) both can apply *Work from home *Telephonic Interview *Experienced candidates will have added advantage

Company Qualcomm India Private Limited Job Area Engineering Group, Engineering Group > Hardware Engineering General Summary Experience in Logic design /micro-architecture / RTL coding is a must. Must have hands on experience with SoC design and integration for complex SoCs. Experience in Verilog/System-Verilog is a must. Should have knowledge of AMBA protocols - AXI, AHB, APB, SoC clocking/reset/debug architecture and peripherals like USB, PCIE and SDCC. Understanding of Memory controller designs and microprocessors is an added advantage Hands on experience in constraint development and timing closure Work closely with the SoC verification and validation teams for pre/post Silicon debug Hands on experience in Low power SoC design is required Experience in Synthesis / Understanding of timing concepts for ASIC is required. Hands on experience in Multi Clock designs, Asynchronous interface is a must. Experience creating pad ring and working with the chip level floorplan team is an added advantage Experience in using the tools in ASIC development such as Lint, CDC, Design compiler and Primetime is required. Minimum Qualifications Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. Preferred Qualifications 2-9 years of experience in SoC design Educational Requirements: 2+ years of experience with a Bachelor’s/ Master’s degree in Electrical engineering Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail myhr.support@qualcomm.com or call Qualcomm's toll-free number found here . Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers. 3063951 Show more Show less

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ SENIOR SOFTWARE DEVELOPMENT ENGINEER The Role AMD is looking for an influential software engineer role to enable AI acceleration at scale. You will be a member of the core team, working on developing ML tools and methodologies to optimize and realize full system performance for AI workloads on Ryzen AI SoC. Working on the latest AI models addressing vision, language, and generative models, working with the leading engineers in AMD’s CPU, GPU, and Adaptable Compute team Key Responsibilities Design and develop efficient code-generation and optimization techniques for AMD's Machine Learning products using MLIR/LLVM Consistently research and implement methods to improve the performance of our solutions. Stay informed of software and hardware trends and innovations, especially pertaining to ML algorithms and architectures. Optimizing current system and research alternative, more efficient ways for same goals. Develop technical relationships with peers and partners. Work with AMD’s architecture specialists to improve future products. Developing and optimizing code for VLIW processors. Preferred Experience Strong object-oriented programming background, C/C++ and/or Python with 3+ years of industry experience Prior experience in Graph compilers and optimizations Deep understanding of the performance implications on AI acceleration of different compute, memory, and communication configurations and hardware and software Good knowledge of AI frameworks like ONNX, Pytorch, TVM, TensorFlow, Familiarity with compiler technologies like MLIR/LLVM. Ability to write high quality code with a keen attention to detail. Familiar with implementation of key ML operations like GEMM, CONV. Experience with software development processes and tools such as debuggers, source code control systems (GitHub) and profilers. Effective communication and problem-solving skills Academic Credentials Bachelor’s or Master's degree in Computer Science, Computer Engineering, Electrical Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. Show more Show less

Role description: Pipeline Development: Design, implement, and maintain large scale CI/CD pipelines which can be tailored for system software and firmware projects written in C and C++. Version Control Management: Work with version control tools (e.g., Git , SVN ) to ensure efficient branching strategies and repository management. Build and Integration: Automate build and integration workflows for firmware and controller software, including cross-compilation for embedded systems. Collaboration with Developers: Collaborate with development teams to ensure seamless integration of new features into the pipelines and provide support for debugging build failures. Testing and Validation: Integrate automated testing frameworks, static code analysis, and unit testing tools. Deployment: Develop and maintain deployment pipelines for firmware to IoT devices and ensure efficient rollbacks when necessary. Monitoring and Optimization: Monitor pipeline performance, troubleshoot issues, and continuously optimize for speed and reliability. Documentation and Standards: Establish and maintain documentation for CI/CD pipelines and ensure adherence to DevOps best practices. Toolchain Management: Manage build environments and dependencies, including compiler toolchains and libraries for C/C++ projects. Security: Implement security practices, including vulnerability scanning and artifact integrity verification, in the pipeline. Education: Bachelor's or master’s degree in computer science, Software Engineering, or a related field. Required Skills & Experience: 7+ Years of Proven experience in DevOps roles, particularly with CI/CD expertise Proficiency in anyone of CI/CD tools like Jenkins, GitLab CI, GitHub, Azure DevOps, or CircleCI. Excellent problem-solving and troubleshooting skills. Good to have prior experience of Key foundational services in cloud platforms like AWS. Good to have hand-on skills in C and C++, with a clear understanding of their building systems (e.g., Makefile, CMake, Bazel). Experience with cross-compilation, embedded systems build processes and working with microcontroller architectures. Knowledge of containerization tools (e.g., Docker) and container orchestration platforms (e.g., Kubernetes) is a plus. Scripting and Automation: Strong scripting skills in Python, Bash, or similar for automation tasks. Testing Tools: Familiarity with automated testing frameworks Version Control Systems: Advanced knowledge of Git workflows, including branching, merging, and tagging strategies. Operating Systems: Experience with Linux environments, particularly for embedded software development. Show more Show less

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. PVT Sensor IP development is a critical offering for process, voltage, temperature, and other monitoring IPs within SOC subsystems. Synopsys is the market leader for these IP developments which are integral parts of Silicon lifecycle monitoring. You Are: As a new, exciting, and challenging position, we are looking for a talented person that can show a great level of initiative and ability to work in a busy and fast-changing environment. This rewarding role is fundamental to the successful and smooth operation of the engineering teams. You will play a vital role in helping to strengthen and develop forecasting capabilities, based upon improved monitoring capacity and forward-looking project schedules. Your understanding of DV flow, generating test benches, and test cases will be crucial. You have experience with RTL and gate-level SDF-annotated simulations and debug, and may also perform mixed-signal (digital + analog) simulations and debug. Your role will involve interacting with our application engineers and providing guidance to customers, participating in the generation of data books, application notes, and white papers. What You’ll Be Doing: Understanding DV flow and generating test benches and test cases. Performing RTL and gate-level SDF-annotated simulations and debug. Conducting mixed-signal (digital + analog) simulations and debug. Interacting with application engineers and providing customer guidance. Contributing to the generation of data books, application notes, and white papers. Performing physical verification and design rule checks to ensure design integrity and manufacturability. Enhancing quality assurance methodology by adding more quality checks and gating. Supporting internal tools development and automation to improve productivity across ASIC design cycles. Driving automation to enhance IP Quality-Assurance flow and release process. Integrating new features and functionalities into IPQA scripts with the automation team. The Impact You Will Have: Ensure the integrity and manufacturability of designs through rigorous verification and checks. Enhance the efficiency and effectiveness of engineering processes through automation and tool development. Support and guide customers, improving their experience and satisfaction with our products. Contribute to the creation of high-quality documentation that aids in the understanding and use of our IPs. Strengthen the forecasting capabilities of the engineering teams, leading to better project planning and execution. Drive innovation and continuous improvement in IP development and quality assurance processes. What You’ll Need: Bachelor’s or master’s degree in electrical engineering or a related field. 3 to 7+ years of experience in A&MS frontend and backend views and collaterals development flows. Proficiency in industry-standard EDA tools, such as Cadence Virtuoso or Synopsys Custom Compiler. Exceptional knowledge of layout design methods, techniques, and methodologies. Experience with physical verification tools, such as Calibre or Assura. Understanding of semiconductor process technologies and their impact on layout design. Familiarity with Synopsys Tool set (such as FC/ICC2, Primetime, Formality, ICV). Good communication and interpersonal skills. Who You Are: A proactive individual with excellent problem-solving and systematic skills. Detail-oriented and capable of working effectively in a team-oriented environment. Adaptable and able to thrive in a fast-paced and dynamic setting. Enthusiastic about continuous learning and technological innovation. Customer-focused with a commitment to delivering high-quality solutions. The Team You’ll Be A Part Of: You will be part of a highly skilled and collaborative engineering team focused on developing leading-edge IPs for the semiconductor industry. This team is dedicated to innovation, quality, and customer satisfaction, working together to push the boundaries of technology and deliver exceptional products. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. Show more Show less

Academic and Pedagogical Skills 1. Teaching Expertise • Experience in teaching undergraduate and postgraduate courses • Ability to design syllabi and instructional materials • Familiarity with Outcome-Based Education (OBE) and Bloom’s Taxonomy 2. Curriculum Development • Participating in curriculum design and course revisions • Integration of industry trends and emerging technologies 3. Student Evaluation & Mentoring • Designing effective assessment tools • Academic and research mentoring of students Technical & Research Skills 1. Core Programming and Software Engineering • Proficiency in languages like Python, Java, C++, or JavaScript • Knowledge of software development life cycle, testing, and maintenance 2. Specialization Areas (depending on expertise) • Artificial Intelligence / Machine Learning / Deep Learning • Data Science / Big Data Analytics • Cybersecurity • Cloud Computing • Internet of Things (IoT) • Blockchain Technology • Web and Mobile Application Development • Computer Networks and Distributed Systems • Operating Systems, Compiler Design, Algorithms 3. Research and Publication Skills • Proven research track record with publications in indexed journals (SCI, Scopus) • Experience in guiding MTech/Ph.D. students • Knowledge of research methodologies, statistical tools, and paper writing 4. Project Handling and Grants • Experience in handling funded research projects (UGC, DST, AICTE, etc.) • Proposal writing and project management Administrative and Management Skills 1. Academic Administration • Experience as coordinator, department head, or committee member • Accreditation and quality assurance processes (NAAC, NBA) 2. Event and Workshop Organization • Conducting FDPs, workshops, conferences, and seminars Soft Skills 1. Communication Skills • Effective verbal and written communication • Ability to convey complex technical concepts clearly 2. Leadership and Teamwork • Ability to mentor junior faculty and lead academic teams • Collaborative mindset for interdisciplinary work 3. Adaptability and Lifelong Learning • Staying updated with new technologies and teaching methods • Taking part in MOOCs, certifications (e.g., NPTEL, Coursera, etc. Academic Responsibilities 1. Teaching & Instruction • Deliver undergraduate and postgraduate courses in CSE/IT. • Prepare lecture plans, assignments, and lab work aligned with curriculum objectives. • Use modern teaching tools and techniques (LMS, virtual labs, etc.). 2. Student Evaluation • Conduct assessments, grade exams, and provide timely feedback. • Supervise student projects, internships, and dissertations. • Mentor students on academic, career, and research development. 3. Curriculum Development • Design and revise syllabi to incorporate latest industry trends and technologies. • Participate in academic committees for curriculum planning and review. Research & Development 1. Scholarly Research • Conduct independent and collaborative research in areas like AI, Data Science, Cybersecurity, etc. • Publish papers in reputed national and international journals/conferences. 2. Research Supervision • Guide undergraduate, postgraduate, and Ph.D. students in research projects. • Assist in securing and executing funded research grants. 3. Collaborations • Develop collaborations with other institutions, industries, and research bodies. Administrative Responsibilities 1. Departmental Duties • Participate in departmental planning, budgeting, and decision-making. • Support department head in managing academic and operational activities. 2. Quality Assurance • Contribute to accreditation processes (NBA, NAAC, ABET, etc.). • Ensure adherence to institutional policies, academic standards, and code of conduct. 3. Event Management • Organize conferences, seminars, workshops, guest lectures, and FDPs. Community & Institutional Engagement 1. Professional Development • Attend and contribute to academic events, seminars, and training programs. • Join professional societies (IEEE, ACM, ISTE, etc.) and maintain a strong academic network. 2. Industry Interaction • Liaise with industry partners for internships, placements, and collaborative projects. • Encourage entrepreneurship and innovation through incubation or tech clubs. 3. Student Support & Welfare • Act as a faculty advisor or mentor. • Provide support for academic and personal growth of students. Minimum Educational Qualifications 1. Ph.D. in CSE/IT or Related Field (Mandatory) • A Ph.D. degree in Computer Science and Engineering, Information Technology, or a closely related discipline (e.g., Artificial Intelligence, Data Science, etc.). • The Ph.D. should be from a recognized university or institute. Prior Education 2. Master’s Degree (M.Tech/M.E.) • M.E. or M.Tech in CSE/IT or related field with first class (minimum 60%) or equivalent CGPA. 3. Bachelor’s Degree (B.E./B.Tech) • B.E. or B.Tech in CSE/IT or allied discipline with first class or equivalent. Show more Show less

About CynLr Just like a baby’s brain, CynLr Visual Intelligence stack makes Robots to instinctively see & pick any object under any ambience, without any training . ( a demo video link ). Today, we don’t have a robot that can fit a screw into a nut without slipping a thread. Imagine what it would take for a robot to assemble a Smartphone or a car by putting together 1000s of parts with varied shapes and weights, all in random orientations. Thus factories become complex, needing heavy customization of their environment. CynLr-enabled visual robots intuitively handle any object, even from a clutter – a universal alternative to custom machines, simplifying factory lines into modular LEGO blocks of micro-factories. Simplifying factories with robots that can pick & place any object has been a 40-year-old pipe dream - touted as The Holy Grail of Robotics . As a SW developer, you will be responsible for building the entire Vision & Learning SW Stack, Task & Robot Control OS, extensively optimising the performance of these algorithms, translating them into an API library for Internal Engineers and Customers, along with creating a UI layer for the end users. Requirements in Practice : Setting up the Project Framework and breaking down the composition of the Software - scalability, modularity & maintainability. Set up a development framework for the distributed development of Software to ensure – Scalability, Modularity and Maintainability. Design and set the Coding standards and guidelines along with the review process to assess the Scalability, Modularity and Maintainability of the code across every stage of Software Development Lifecycle Identify the platforms, Setup Tool Chains and support APIs needed for every stage of the Development process – Visual Studio IDE setup, Continuous Integration, Debugging for Multi-Threads, Licensing, Cross Language Licensing, Dependency Bundling, etc. Set up the C++ project templates for Services Architecture, API structure and state machine. Design the development process for Parallel Threaded Coding and debugging. Train the team with Debugging skills and the nuances of performance improvements with C++. Design the Dependency architecture and version management system Design the release management system & API/Library Licensing. Design Test Frameworks for Integration, distribution, Performance profiling & Safety. Must have an understanding of : Compiler working and construction. CPU architectures – x86, x64 & ARM Hardware-associated driver development. OS and layers (Board Support Packages, BIOS, UEFI, BootLoader) Memory architectures and optimizations. MIMD, SIMD Good to have experience and practice with GPU-based application development. Knowledge of CUDA (Excellency is not necessary) State machine architecture Realtime computing UI-based deployable application development Team Structure: The engineering team will comprise of – Algo Team, GPU Team, Software Dev Team & HW Team. Members of other teams will be passive members of each team, apart from the team they lead. The Algo Team will provide the Neural Models & Vision algorithms, while the GPU Team will provide the GPU optimizations for the algos, Hardware team will provide the HW integration and the Software team with translate GPU optimized algos into SW blocks. Each team will split the implementation among other teams and guide them through the implementation. Every team member will be a passive member of all other teams. What will you do? Your contribution is predominantly (but not confined only to) architecting, defining test cases, reviewing & implementing all the SW & firmware parts and development effort - the image processing, Neural Models, APIs, vision sequences, manipulation sequences, drivers, etc. Your thorough knowledge of system architecture, C++ skill set, design patterns & your penchant for application-oriented SW design thought processes, will drive and implement the whole software design & development part. You will also provide architectures and approaches for the drivers to be developed to keep them modular and scalable, and consistently review them all. How will you Do? You have complete freedom here, but you will be subjected to reviews. Since this is a startup and the product is not yet well-defined, you would be the one with the responsibility of defining it. Expect things to be not orderly and requirements to not be solid. Part of your design effort largely involves requirements building, too and developing architectures that are agnostic to such requirement changes. The SW part of the product significantly evolves as per your thought process and will henceforth carry your signature in it. You will also be building a team as the product evolves to maintain and develop further. Though confined to a focused area, the work is pretty much expected to be entrepreneurial with the exact advantages and difficulties of a startup. Show more Show less

o Job Description: Experience: 4-6years Tapeout experience in block level PnR implementation including synthesis for medium to complex blocks o Good to have experience in TSMC/Intel lower technology node(16/14nm or below) o Experience in independently analyzing/resolving congestion, timing issues and basic understanding of clock tree build o Basic Timing understanding to independently analyze timing paths o Experience in ICC2/Innovus/DC tools, Fusion compiler being added advantage o Basic equivalency check understanding. Good to have Conformal LEC experience. o Should have understanding of basic shell scripting, tool based TCL scripting to automate redundant tasks Show more Show less

Location Karnataka Bengaluru Experience Range 8 - 12 Years Job Description PD: Technical Skills: Should be able to handle Full chip PnR (timing/congestion/CTS issues), understanding of IO ring, package support, multi voltage design Deep understanding of the concepts related to synthesis, place & route, CTS, timing convergence, IR/EM checks and signoff DRC/LVS closure Responsible for independent planning and execution of all aspects of physical design including floor planning, place and route, Clock Tree Synthesis, Clock Distribution, extraction, Timing closure, Power and Signal Integrity Analysis, Physical Verification, DFM Must have participated in all stages of the design (floor planning, placement, CTS, routing, physical verification, IREM) Well versed with the timing closure (STA), timing closure methodologies Good Understanding of DRC, LVS,ERC and PERC rule files for lower tech node layout verification Experience in lower tech node (<7nm) Good automation skills in PERL, TCL and EDA tool-specific scripting Able to take complete ownership for Block/sub-system for complete execution cycle Out of box thinking to meet tighter PPA requirements Qualification: BE/BTECH/MTECH in EE/ECE with proven experience in ASIC Physical Design Detailed knowledge of EDA tools and flows, Fusion compiler based RTL2GDS flow is desired Experience – 11+

Applied Materials is the leader in materials engineering solutions to produce virtually every new chip and advanced display in the world. Our expertise in modifying materials at atomic levels and on an industrial scale enables customers to transform possibilities into reality. Our innovations make possible™ the technology shaping the future. To achieve this, we employ some of the best, brightest, and most talented people in the world who work together as part of a winning team. Key Responsibilities Expertise in PDK enablement and library validation/automation. Hands-on experience with LVS/Parasitic extraction/standard cell characterization flows and methodologies Design/System level experience with DTCO and PPA analysis Hands-on expertise in TCL, Python, make and shell scripting Broad understanding of system design (product architecture, packaging, SRAM, DRAM, etc.) is a plus Strong understanding of the RTL2GDS concepts and methodology and experience with Synopsys/Cadence physical design tools (Fusion Compiler/Innovus) Knowledge of standard cell architecture and design tradeoffs with respect to PPA Proactively identify and act on new trends or developments in future technology nodes Ability to implement solutions and troubleshoot complex problems with limited or no supervision in area of expertise Creative thinking and ability to look ahead and anticipating future technology innovations/issues Ability to collaborate with internal stakeholders, customers and vendors Collaborate/participate in discussions to solve interdisciplinary technical issues in a cross-functional team environment Mandatory - PDK, DRC, LVS, Python, Physical Design Functional Knowledge Demonstrates depth and/or breadth of expertise in own specialized discipline or field Business Expertise Interprets internal/external business challenges and recommends best practices to improve products, processes or services Leadership May lead functional teams or projects with moderate resource requirements, risk, and/or complexity Problem Solving Leads others to solve complex problems; uses sophisticated analytical thought to exercise judgment and identify innovative solutions Impact Impacts the achievement of customer, operational, project or service objectives; work is guided by functional policies Interpersonal Skills Communicates difficult concepts and negotiates with others to adopt a different point of view Qualifications Education: Master's Degree Skills Certifications: Languages: Years of Experience: 7 - 10 Years Work Experience: Additional Information Shift: Day (India) Travel: Yes, 10% of the Time Relocation Eligible: Yes Applied Materials is an Equal Opportunity Employer committed to diversity in the workplace. All qualified applicants will receive consideration for employment without regard to race, color, national origin, citizenship, ancestry, religion, creed, sex, sexual orientation, gender identity, age, disability, veteran or military status, or any other basis prohibited by law. Show more Show less

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Position: Sr Principal Software Engineer Grade: T5 Location: Noida Job Responsibilities The role’s day to day responsibilities cover: R&D support of application and product engineers for customer problems and requests. This consists of problem analysis, debugging and fixing, or the development of new features and enhancements to improve synthesis results with respect to timing, area and power. This job will suit applicants looking to continue their software engineering career in an intellectually stimulating and challenging problem domain. There is a significant research element to the work that Cadence does that is truly innovative; we don’t know what the answers are when we start out! Mentoring and support will be provided to the successful candidate to both enable contribution to the large EDA problem domain and to develop their programming skills into professional software engineering skills. Job Qualifications BE/BTech/ME/MTech- Computer Science or others Experience: 11-15 Yrs Required Skills Develop reliable, scalable, and high-performance Modus DFT software that is easy to use. Develop software tools in C/C++ to support DFT and ATPG. Research and develop software solutions to allow greater efficiency in architecture, hardware, and software teams. Development environment is C++ on Unix in multi-threaded environment with expertise in C++, data-structure and algorithms. Strong knowledge of Tcl is preferred Experience in language compiler Prior experience with large software development projects is highly recommended. We’re doing work that matters. Help us solve what others can’t. Show more Show less

The Opportunity We're looking for the Wavemakers of tomorrow. Alphawave Semi enables tomorrow’s future by accelerating the critical data communication at the heart of our digital world – from seamless video streaming to AI to the metaverse and much more. Our technology powers product innovation in the most data-demanding industries today, including data centers, networking, storage, artificial intelligence, 5G wireless infrastructure, and autonomous vehicles. Customers partner with us for mission-critical data communication, our innovative technologies, and our proven track record. Together, we enable the next generation of digital technology. Alphawave Semi is expanding its team in Chiplet Architecture and Design! We are looking for experienced RTL Design Engineers to contribute to our next generation Chiplet designs. This is an incredible opportunity to be part of the AI revolution and contribute to the complete ASIC development cycle, from concept to product. As an RTL Design Engineer, you will work in SoC design and SOC-Subsystem design. You will be responsible for microarchitecture/RTL coding of the SOC/subsystems and create microarchitecture documents. You will work with verification teams on achieving the code & functional coverage. You will work with Physical design team to meet area, power and performance goals. You will support physical design teams, verification teams, software teams and FPGA teams to ensure high quality SoC and ensure successful tapeout. What You'll Do : Micro architect and RTL Design of SoC SubSystem/IP blocks Will develop UPF and run CLP checks Will be responsible for RTL quality checks - Lint/CDC/LEC Create appropriate documentation for hardware blocks. Responsible for analyse / debug / fixing issues reported by verification team Will develop the synthesis constraints for the blocks / subsystem Work with SOC Architect/Leads to integrate the design, review/sign-off verification plan, DFT and PD implementation What You'll Need: Education: Bachelor's or master's degree in electrical or Electronics and Communication or Computer Science Engineering. Experience: 14+ years of proven experience in SoC architecture, development, and full-chip design for multi-million gate SoCs. Expertise: Strong understanding of the design convergence cycle, including architecture, micro-architecture, verification, synthesis and timing closure. Expertise in managing IP dependencies, as well as planning and tracking front-end design tasks. Ability to drive project milestones across design, verification, and physical implementation phases. Experience in CPU, high-speed serial interfaces, or coherence/noncoherent NOC domains is highly desirable. Skills: Excellent communication and interpersonal skills. Ability to collaborate in a fast-paced, product-oriented, and distributed team environment. Minimum Qualifications: SoC Design Experience: Minimum 14+ years of hands-on experience in SoC design. Architecture Development: Ability to develop architecture and micro-architecture based on specifications. Bus Protocols & Peripherals: Strong knowledge of bus protocols such as AHB, AXI, and peripherals like PCIe, USB, Ethernet, etc. Memory Controllers & Microprocessors: Experience with memory controller designs and microprocessors is an advantage. Chip IO Design: Knowledge of chip IO design and packaging is beneficial. Test Plans & Verification: Proficient in reviewing high-level test plans and coverage metrics. Synthesis & Formal Verification: Expertise in Design Compiler Synthesis and formal verification using LEC. Timing Closure: Comprehensive understanding of timing closure is mandatory. Post-Silicon Debug: Experience in post-silicon bring-up and debugging. Decision Making: Ability to make effective decisions under incomplete information. Communication & Leadership: Strong leadership and communication skills to ensure effective program execution. "Hybrid work environment" As part of our commitment to the well-being and satisfaction of our employees, we have designed a comprehensive benefits package that includes: Great compensation package Restricted Stock Units (RSUs) Hybrid Working Model Provisions to pursue advanced education from Premium Institute, eLearning content providers Medical Insurance and a cohort of Wellness Benefits Educational Assistance Advance Loan Assistance Office lunch & Snacks Facility Equal Employment Opportunity Statement Alphawave Semi is an equal opportunity employer, welcoming all applicants regardless of age, gender, race, disability, or other protected characteristics. We value diversity and provide accommodations during the recruitment process. Show more Show less

The Opportunity We're looking for the Wavemakers of tomorrow. Alphawave Semi enables tomorrow’s future by accelerating the critical data communication at the heart of our digital world – from seamless video streaming to AI to the metaverse and much more. Our technology powers product innovation in the most data-demanding industries today, including data centers, networking, storage, artificial intelligence, 5G wireless infrastructure, and autonomous vehicles. Customers partner with us for mission-critical data communication, our innovative technologies, and our proven track record. Together, we enable the next generation of digital technology. What You'll Do : Responsible for PDK evaluation, setup, customization, and flows definition Drive and implement specific Custom Design Automation flows such as Schematic entry, Layout design - color aware and DPT/MPT Parasitic Extraction for transistor level flow Device Modeling and Simulation environment in Synopsys' Custom Compiler PrimeSim XA circuit simulators Knowledge and hands-on experience in physical verification – DRC, LVS, and DFM checks Knowledge of Electrical verification like EMIR, ERC, PERC Knowledge of Analog cell characterization Knowledge of Reliability Verification Drive Interfacing between Digital and Analog/Mixed signal methodologies. . Develop Custom flows automation, rule deck customizations, improve productivity and efficiency. Train, Deployment and support of Automation flows to Design teams Debug flow issues and testcases from Design teams for Simulation, LVS, DRC, EMIR, post layout simulation. Assist Tape outs, final chip finishing runs, interface across foundry/customer for rulesets You will be reporting to Manager IP Modelling Team. What You'll Need: Must have a minimum Bachelor's degree in Electronic Engineering or a related program Must have 2 to 5 years of work experience in a CAD Automation engineer role. Experience with different Technology nodes (7nm, 5nm, 4nm, 3nm, etc) Experience with the different foundries (TSMC, SAMSUNG, etc) and design techniques. Good to have: Good knowledge of Analog/Mixed-signal Design and Development in Synopsys/Cadence Design environment. Good knowledge of EDA Tools and Methodologies in Analog/Mixed Signal Design and Development. Experience with standards and formats like Spice, CDL, LEF, DEF, Verilog, SPEF, GDS, OA, LIB, etc. Good knowledge of scripting skills – TCL, Python, C-Shell scripts, PERL, etc. Good knowledge of Data management aspects using Git/ SVN/ICManage / Cliosoft / Perforce / Methodics / etc. Good knowledge of 14nm/10nm/7nm/5nm/4nm/3nm finfet technologies Good knowledge of Deep Submicron Issues/technologies ( Understanding of Job submission and monitoring is a plus Understanding of tool License features and license administration is a plus ''We have a flexible work environment to support and help employees thrive in personal and professional capacities” As part of our commitment to the well-being and satisfaction of our employees, we have designed a comprehensive benefits package that includes: Competitive Compensation Package Restricted Stock Units (RSUs) Provisions to pursue advanced education from Premium Institute, eLearning content providers Medical Insurance and a cohort of Wellness Benefits Educational Assistance Advance Loan Assistance Office lunch & Snacks Facility Equal Employment Opportunity Statement Alphawave Semi is an equal opportunity employer, welcoming all applicants regardless of age, gender, race, disability, or other protected characteristics. We value diversity and provide accommodations during the recruitment process. Show more Show less

Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around the world to develop highly innovative electronic products faster and more cost-effectively. Our customers use our tools to push the boundaries of technology and physics to deliver better products in the increasingly complex world of chip, board, and system design. Questa Simulation Product It is a core R&D team working on multiple verticals of Simulation. A very energetic and enthusiastic team of motivated individuals. This role is based in Noida. But you’ll also get to visit other locations in India and globe, so you’ll need to go where this job takes you. In return, you’ll get the chance to work with teams impacting entire cities, countries, and the shape of things to come. We make real what matters! Key Responsibilities: We are looking for a highly motivated software engineer to work in the QuestaSim R&D team of the Siemens EDA Development responsibilities will include core algorithmic advances and software design/architecture. You will collaborate with a senior group of software engineers contributing to final production level quality of new components and algorithms and to build new engines and support existent code. Self-motivation, self-discipline and the ability to set personal goals and work consistently towards them in a dynamic environment will go far towards contributing to your success. Are you excited to know more about this Role ? Job Qualification: An ideal candidate should have skills below: B.Tech or M.Tech in Computer Science & Engineering (CSE), Electrical Engineering (EE), or Electronics & Communication Engineering (ECE) from a reputable engineering institution having 8 - 15 years of experience. Strong knowledge of C/C++, algorithms, and data structures. Familiarity with compiler concepts and optimizations. Experience with UNIX and/or LINUX platforms is essential. Excellent problem-solving and analytical skills. Self-motivated with the ability to work independently and guide others towards successful project completion. We are not looking for superheroes, just super minds! Having the below skills will be an added advantage: Strong understanding of basic digital electronics concepts. Familiarity with machine learning (ML) and artificial intelligence (AI) algorithms, particularly their implementation in data-driven tasks. Proficiency in hardware description languages such as Verilog, SystemVerilog, and VHDL. Experience with parallel algorithms and job distribution techniques. Exposure to simulation or formal verification methodologies is a plus. We are Siemens A collection of over 377,000 minds building the future, one day at a time in over 200 countries. We're dedicated to equality, and we encourage applications that reflect the diversity of the communities we work in. All employment decisions at Siemens are based on qualifications, merit and business need. Bring your curiosity and creativity and help us shape tomorrow! We offer a comprehensive reward package which includes a competitive basic salary, variable pay, other benefits, pension, healthcare and actively support working from home. We are an equal opportunity employer and value diversity at our company. We do not discriminate based on race, religion, color, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status. Transform the everyday #DVT Show more Show less

Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Systems Engineering General Summary: Job overview: Our power efficient GPU solution is fundamental to enable new exciting markets like VR, IoT, AI, drone, autonomous driving etc. GPU compiler is a key component of graphics solution. We are looking for talented, self-motivated engineers to create world class GPU compiler products to enable high performance graphics and compute with low power consumption. The engineers will actively work with compiler developers on testing/verification for various graphics languages and development targets, as well as develop high quality automation tools. All Qualcomm employees are expected to actively support diversity on their teams, and in the Company. Minimum Qualifications: Good hands-on experience of test methodology and test processes, including requirements collection and test plan development, testing automation and verification techniques. Strong understanding of Software Releases, Integration, and configuration management process/tools (Git, Make, CMake, MSBuild, JIRA, Perforce, etc.) Familiar with product software development/integration and release process/strategy Plan and execute product software integration/testing and build/release Good knowledge in programming using any scripting languages [Python/Perl] Good knowledge in Tools/Automation development – C/C++, Python/Django, Database Good communication at multiple levels and across multiple disciplines. Ability to work on Windows, Linux, and Android environments Self-motivated, adaptable, and independent, capable of working with limited supervision, pro-actively reporting on status and tasks. 2 to 10 years of hands-on experience in the above areas. Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 4+ years of Systems Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 3+ years of Systems Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field and 2+ years of Systems Engineering or related work experience. Preferred Qualifications: Experience in android and windows build system, integration and associated tools, issue analysis and resolving Experience in Linux/Windows continuous integration development and Linux/Windows based build system enhancement Good Knowledge in programming using any either scripting languages [Perl/Python/Ruby] Plan and execute product software integration/testing and build/release Requirement’s collection and test plan development, testing automation and verification techniques. Familiarity with smartphone development environment (e.g. Android SDK) is a plus. Keywords: Testing, Integration, Test automation, Python, Scripting language, Build systems, Graphics, Compiler Educational Requirements: Required: Bachelor's, Computer Engineering and/or Computer Science and/or Electrical Engineering and/or Electronics & Satellites Eng and/or Information Technology Preferred: Master's, Computer Engineering and/or Computer Science and/or Electrical Engineering and/or Electronics & Satellites Eng and/or Information Technology Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers. 3069892 Show more Show less

Role Description Additional Comments:Physical Design Engineer Experience- 4 to 10 years Engineers is expected to be very good in Basic Fundamentals of C-MOS technology Expected to have a very good understanding of the PD Flow for flat and hierarchal designs Able to handle RTL/Netlist to GDSII independently at block level/SS/SoC and should have done multiple tape outs with low power implementation (Experience on floor planning, Partitioning, integration at Subsystem/Chip will be add advantage) Should have hands-on experience of working on Lower technology nodes like 3nm, 5nm, 7nm, 10nm, 14nm, 16nm, 28nm etc. Hands-on experience in floor planning, placement optimizations, CTS and routing. Hands-on experience in block/top level signoff STA, physical verification (DRC/LVS/ERC/antenna) checks and other reliability checks(IR/EM/Xtalk) Should have expertise on industry standard EDA tools from Synopsys , Cadence and Mentor ( ICC2, Fusion-Compiler, Design Compiler, Primetime, PTSI, IC Validator, Innovus, Genus, Tempus, Encounter, Nanoroute, Calibre, StarRC and Redhawk, voltage storm Exposure in DMSA flow for ECO generation and implementation. Good knowledge of VLSI process and scripting in TCL, perl . Skills Physical design,PNR,PD Flow Show more Show less

We Are: At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you. Our Silicon Design & Verification business is all about building high-performance silicon chips—faster. We’re the world’s leading provider of solutions for designing and verifying advanced silicon chips. And we design the next-generation processes and models needed to manufacture those chips. We enable our customers to optimize chips for power, cost, and performance—eliminating months off their project schedules. You Are: You are a highly skilled and passionate engineer with a talent for tackling complex problems and a strong desire to advance cutting-edge technology. With over five years of experience in Physical Implementation RTL-GDS, you bring deep expertise in autonomously diagnosing and resolving synthesis and place-and-route (PnR) challenges. You are proficient in scripting languages like Tcl, Unix, and Perl, and possess an in-depth knowledge of Synopsys implementation tools. Your strong communication abilities enable you to engage effectively with both customers and internal teams, ensuring precise and attentive fulfillment of their needs. Driven, self-starting, and highly collaborative, you excel in environments where you can advocate for customers and represent the product. Additionally, your ability to translate technical insights into actionable requirements for R&D teams plays a crucial role in driving innovation and strengthening Synopsys solution capabilities. What You’ll Be Doing: Providing technical support and expertise to global customers using Synopsys Implementation products. Engaging in specific flagship projects and providing enabling solutions in all parts of the design implementation flow. Participating in technical campaigns to drive Synopsys solution adoption through hands-on involvement. Acting as a customer advocate while interfacing with the product development team to influence product roadmap and future technologies. Contributing to technical articles in the Knowledge Base to provide self-help guidance for common customer issues. Rolling out new product methodologies by providing training and technical support to customers. The Impact You Will Have: Delivering comprehensive support and effective technical solutions to enhance customer satisfaction. Driving innovation by addressing design challenges and improving product performance based on customer feedback. Collaborating with R&D teams to advance future technologies and product features. Promoting Synopsys tools to grow market presence and adoption. Ensuring seamless EDA transitions to optimize customer outcomes. Strengthening Synopsys' reputation as a leader in silicon design and verification. What You’ll Need: Bachelor's or Master's degree in Electrical Engineering, Computer Science, or a related field. Expertise in Implementation Methodologies and Synopsys Tool Fusion Compiler. Knowledge of STA, Low Power Flows, Design Planning, and scripting languages like TCL/Python. Thorough understanding of RTL to GDS flows and methodologies. Excellent verbal and written communication skills. Experience in customer-facing roles is a plus. Deep domain knowledge in Synthesis, Place & Route, and timing analysis, with multiple chip tape-outs at 7nm or lower nodes. Who You Are: An effective communicator with strong interpersonal skills. A proactive self-starter who takes initiative and drives projects to completion. A collaborative team player who values teamwork and collective success. Detail-oriented and committed to delivering high-quality solutions. Adaptable and eager to learn new technologies and methodologies. The Team You’ll Be A Part Of: You will be part of a dedicated team of application engineers focused on providing top-notch technical support and solutions to our customers. The team's core purpose is to ensure customer success and satisfaction by leveraging Synopsys' cutting-edge technologies and products. You will collaborate closely with other engineers, sales teams, and product development teams to achieve our collective goals and drive innovation in the industry. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. Show more Show less

Description Millions of people experience Synaptics every day. Our technology impacts how people see, hear, touch, and engage with a wide range of IoT applications – at home, at work, in the car or on the go. We solve complex challenges alongside the most influential companies in the industry, using the most advanced algorithms in areas such as machine learning, biometrics and video processing, combined with world class software and silicon development. Overview Synaptics is looking for a talented Sr. Software Engineer to join our dynamic and growing organization. You will be responsible for the customer design-in activities from the design review phase through to mass production, for Synaptics Astra® SL Series of Embedded processors. The Astra® SL Series is a family of highly integrated AI-native Linux SoCs optimized for multi-modal Consumer and Industrial IoT workloads with high-performance hardware accelerators for edge-based inferencing, security, graphics, vision and audio. These processors incorporate multiple high-performance compute engines including a quad-core Arm64 CPU subsystem, multi-TOPS NPU, GPU for AI-acceleration and 3D Graphics, along with multimedia accelerators for Image Signal Processing, 4K video encode and decode, backed by industry-grade security certifications. This position reports to the Sr. Manager, Software Engineering. Responsibilities & Competencies Job Duties Design and develop NPU compilers optimized for machine learning applications Develop optimized computation kernels of Deep Learning Operators Create and implement algorithms and data structures to enhance NPU compiler performance Build software tools for visualization, analysis, debugging, and testing of compiler development Work with open-source compiler frameworks like MLIR to improve compiler functionality Contribute to the deep learning network front-end of the compiler Participate in all stages of the software development lifecycle, including requirements analysis, design, implementation, qualification, and production release Actively collaborate with a global team working on cutting-edge technology to create revolutionary products Competencies Strong understanding of system software and SoC architecture. Proficiency in C/C++ and Python with excellent coding skills. Proactive, self-starter, able to work independently in a fast-paced environment Well organized with strong attention to detail; proactively ensures work is accurate Positive attitude and work ethic; unafraid to ask questions and explore new ideas Good design, programming, and problem-solving skills and able to solve problems through practical use of technology and a solid understanding of product architecture Good verbal and written communication skills, in English Strong team player with the ability to work collaboratively within a diverse cross-functional team Qualifications (Requirements) Bachelor’s (or Master’s) degree in Electrical Engineering, Software Engineering, Computer Science or related field or equivalent 5+ years’ experience in embedded software development Expertise in analyzing, profiling, and debugging C/C++ and Python code. Familiarity with compiler frameworks like LLVM, MLIR, or similar is a strong plus. Hands-on experience in one or more of the following areas: deep learning frameworks such as PyTorch, ONNX, or TensorFlow, Python modules including NumPy and Pandas, Transformer-based architecture No travel required Belief in Diversity Synaptics is an Equal Opportunity Employer committed to workforce diversity. Qualified applicants will receive consideration without regard to race, sex, sexual orientation, gender identity, national origin, color, age, religion, protected veteran or disability status, or genetic information. Show more Show less

The Opportunity We're looking for the Wavemakers of tomorrow. Alphawave Semi enables tomorrow’s future by accelerating the critical data communication at the heart of our digital world – from seamless video streaming to AI to the metaverse and much more. Our technology powers product innovation in the most data-demanding industries today, including data centers, networking, storage, artificial intelligence, 5G wireless infrastructure, and autonomous vehicles. Customers partner with us for mission-critical data communication, our innovative technologies, and our proven track record. Together, we enable the next generation of digital technology. Alphawave Semi is expanding its team in Chiplet Architecture and Design! We are looking for experienced RTL Design Engineers to contribute to our next generation Chiplet designs. This is an incredible opportunity to be part of the AI revolution and engage in the complete ASIC development cycle, from concept to product. We are seeking a seasoned SoC leads to work with a team to solve complex problems while optimizing performance, area, and power on leading-edge SoC systems. This team helps build new and innovative connectivity products tailored to world changing solutions for AI accelerators, Compute, IO, and Memory Chiplets. What You'll Do: You will manage the design / RTL team to achieve the project goals You will work with customer, provide technical support and provide collaterals agreed upon. You will work with team to achieve flow, methodology improvements to achieve high reuse. You will work with IP vendors to generate / get right configurations of the IP. You will manage teamwork allocation, schedule, risk mitigation and deliverables from design team. Interact closely with the architecture team and develop implementation strategies to meet quality, schedule, and power performance area for the SOC. Interact with the subsystem team and plan SOC milestones, plan quality checks as part of SOC milestones and guide subsystem teams with SOC level requirements (e.g., IPXACT, CSR, Lint, CDC, SDC, UPF, etc.). Work with the cross-functional team of verification, DFT, Physical Design, emulation, and software teams to make design decisions and represent Design status throughout the development process. What you'll have: Education: Bachelor's or master's degree in electrical or Electronics and Communication or Computer Science Engineering. Experience: 15+ years of proven experience in SoC architecture, development, and full-chip design for multi-million gate SoCs. Expertise: Strong understanding of the design convergence cycle, including architecture, micro-architecture, verification, synthesis and timing closure. Expertise in managing IP dependencies, as well as planning and tracking front-end design tasks. Ability to drive project milestones across design, verification, and physical implementation phases. Experience in CPU, high-speed serial interfaces, or coherence/noncoherent NOC domains is highly desirable. Skills: Excellent communication and interpersonal skills. Ability to collaborate in a fast-paced, product-oriented, and distributed team environment. Minimum Qualifications: SoC Design Experience: Minimum 15+years of hands-on experience in SoC design. Architecture Development: Ability to develop architecture and micro-architecture based on specifications. Bus Protocols & Peripherals: Strong knowledge of bus protocols such as AHB, AXI, and peripherals like PCIe, USB, Ethernet, etc. Memory Controllers & Microprocessors: Experience with memory controller designs and microprocessors is an advantage. Chip IO Design: Knowledge of chip IO design and packaging is beneficial. Test Plans & Verification: Proficient in reviewing high-level test plans and coverage metrics. Synthesis & Formal Verification: Expertise in Design Compiler Synthesis and formal verification using LEC. Timing Closure: Comprehensive understanding of timing closure is mandatory. Post-Silicon Debug: Experience in post-silicon bring-up and debugging. Decision Making: Ability to make effective decisions under incomplete information. Communication & Leadership: Strong leadership and communication skills to ensure effective program execution. "Hybrid work environment" As part of our commitment to the well-being and satisfaction of our employees, we have designed a comprehensive benefits package that includes: Great compensation package Restricted Stock Units (RSUs) Hybrid Working Model Provisions to pursue advanced education from Premium Institute, eLearning content providers Medical Insurance and a cohort of Wellness Benefits Educational Assistance Advance Loan Assistance Office lunch & Snacks Facility Equal Employment Opportunity Statement Alphawave Semi is an equal opportunity employer, welcoming all applicants regardless of age, gender, race, disability, or other protected characteristics. We value diversity and provide accommodations during the recruitment process. Show more Show less

The Opportunity We're looking for the Wavemakers of tomorrow. Alphawave Semi enables tomorrow’s future by accelerating the critical data communication at the heart of our digital world – from seamless video streaming to AI to the metaverse and much more. Our technology powers product innovation in the most data-demanding industries today, including data centers, networking, storage, artificial intelligence, 5G wireless infrastructure, and autonomous vehicles. Customers partner with us for mission-critical data communication, our innovative technologies, and our proven track record. Together, we enable the next generation of digital technology. Alphawave Semi is expanding its team in Chiplet Architecture and Design! We are looking for talented RTL Design Engineers to contribute to our next generation Chiplet designs. This is an incredible opportunity to be part of the AI revolution and engage in the complete ASIC development cycle, from concept to product. As an RTL Design Engineer, you will work in SoC design and SOC-Subsystem design. You will be responsible for microarchitecture/RTL coding of the SOC/subsystems and create microarchitecture documents. You will work with verification teams on achieving the code & functional coverage. You will work with Physical design team to meet area, power and performance goals. You will support physical design teams, verification teams, software teams and FPGA teams to ensure high quality SoC and ensure successful tapeout. What You'll Do: Micro architect and RTL Design of SoC SubSystem/IP blocks Will develop UPF and run CLP checks Will be responsible for RTL quality checks - Lint/CDC/LEC Create appropriate documentation for hardware blocks. Responsible for analyse / debug / fixing issues reported by verification team Will develop the synthesis constraints for the blocks / subsystem Work with SOC Architect/Leads to integrate the design, review/sign-off verification plan, DFT and PD implementation What You'll Need: Education: Bachelor's or master's degree in electrical or Electronics and Communication or Computer Science Engineering. Experience: 5+ years of proven experience in SoC architecture, development, and full-chip design for multi-million gate SoCs. Expertise: Strong understanding of the design convergence cycle, including architecture, micro-architecture, verification, synthesis and timing closure. Expertise in managing IP dependencies, as well as planning and tracking front-end design tasks. Ability to drive project milestones across design, verification, and physical implementation phases. Experience in CPU, high-speed serial interfaces, or coherence/noncoherent NOC domains is highly desirable. Skills: Excellent communication and interpersonal skills. Ability to collaborate in a fast-paced, product-oriented, and distributed team environment. Minimum Qualifications: SoC Design Experience: Minimum 5+ years of hands-on experience in SoC design. Architecture Development: Ability to develop architecture and micro-architecture based on specifications. Bus Protocols & Peripherals: Strong knowledge of bus protocols such as AHB, AXI, and peripherals like PCIe, USB, Ethernet, etc. Memory Controllers & Microprocessors: Experience with memory controller designs and microprocessors is an advantage. Chip IO Design: Knowledge of chip IO design and packaging is beneficial. Test Plans & Verification: Proficient in reviewing high-level test plans and coverage metrics. Synthesis & Formal Verification: Expertise in Design Compiler Synthesis and formal verification using LEC. Timing Closure: Comprehensive understanding of timing closure is mandatory. Post-Silicon Debug: Experience in post-silicon bring-up and debugging. Decision Making: Ability to make effective decisions under incomplete information. Communication & Leadership: Strong leadership and communication skills to ensure effective program execution. "Hybrid work environment" As part of our commitment to the well-being and satisfaction of our employees, we have designed a comprehensive benefits package that includes: Great compensation package Restricted Stock Units (RSUs) Hybrid Working Model Provisions to pursue advanced education from Premium Institute, eLearning content providers Medical Insurance and a cohort of Wellness Benefits Educational Assistance Advance Loan Assistance Office lunch & Snacks Facility Equal Employment Opportunity Statement Alphawave Semi is an equal opportunity employer, welcoming all applicants regardless of age, gender, race, disability, or other protected characteristics. We value diversity and provide accommodations during the recruitment process. Show more Show less