426 Compiler Jobs

Job Requirements 1. Work on latest machine learning technologies 2. Work on supporting for latest Linux operating system 3. Work on AMD next generation GPUs/Accelerators 4. Work on optimizing latest Rocm drivers and improve performance 5. Design new machine learning technologies Work Experience MS/BS degree in Computer Science or an equivalent Deep Knowledge of C/C++ and Python programming Experience with Linux Commands is must Experience with Scripting language like bash/powershell Understanding of various python ML frameworks like Pytorch, Transformers etc Understanding of various language and compiler for writing highly efficient custom Deep-Learning GPU Kernels. like Triton/Jax Hands on Debugging Experience with gdb, valgrind etc Experience and understanding of AI Models and Inferencing Engines like vllm/ollama/llama.cpp/sglang Experience with Profiling tools needed to debug CUDA/ROCm Kernels like nsys/rocprof is a plus. Knowledge of GPU architecture, PC architecture Experience in writing ROCM/CUDA Kernels/Shader Deep understanding and experience in implementation of Machine learning and AI algorithm. Good communication skills and able to work with stakeholders effectively Knowledge of x86 assembly language and x86/x64 CPU instructions is a plus

Key skills with hand on: Physical design Engineer, floor planning, Routing, Placement ,CTS, Synthesis ,Timing analysis/Timing Closure,Fullchip,Netlist2GDSII, ICC ,Fusion Compiler, ICV, Calibre ,ICC2, Primetime,PT-Px Experience: 5 - 25 years Work Location: Trivandrum, Bangalore, Hyderabad, Chennai, Pune Education: Engineering (excluding Mechanical/Civil) Detailed JD: • In-depth knowledge and hands-on experience on Netlist2GDSII Implementation i.e. Floor planning, Placement, CTS, Routing, STA, Power Integrity Analysis, Physical Verification. • Should have experience on Physical Design Methodologies and submicron technology of 28nm and lower technology nodes. • Should have experience on programming in Tcl/Tk/Perl. • Must have hands-on experience on Synopsys/Cadence tools. (Innovus, ICC2, Primetime, PT-PX, Calibre). • Well versed with timing constraints, STA and timing closure. • Inspirational leadership style, good communication skills, and ability to work in a global environment In-depth knowledge and hands-on experience on Netlist2GDSII Implementation i.e. Floor planning, Placement, CTS, Routing, STA, Power Integrity Analysis, Physical Verification. • Should have experience on Physical Design Methodologies and submicron technology of 28nm and lower technology nodes. • Should have experience on programming in Tcl/Tk/Perl · Well versed with timing constraints, STA and timing closure.

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a seasoned engineer with a passion for pushing the boundaries of technology. With 3 -7 years of experience, you bring a wealth of knowledge in software architecture. You excel in C/C++ software development, digital simulation, compiler optimizations and your strong background in design patterns, data structures, and algorithms sets you apart. Your expertise in Verilog, SystemVerilog, coupled with your experience in Unix/Linux platforms, makes you a valuable asset. You are well-versed in developer tools like gdb and Valgrind. Your analytical and problem-solving skills are top-notch, and you are always eager to learn and explore new technologies. As a highly enthusiastic and energetic team player, you are ready to go the extra mile to achieve success. What You’ll Be Doing: - Designing, developing, and troubleshooting core algorithms for compiler. - Collaborating with local and global teams to enhance runtime performance for verilog compiler. - Engaging in pure technical roles focused on software development and architecture. - Utilizing your knowledge of digital simulation flows and EDA tools to drive innovation. - Leveraging your expertise in Verilog, SystemVerilog, and VHDL to develop cutting-edge solutions. The Impact You Will Have: - Driving technological innovation in chip design and verification. - Enhancing the performance and quality of simulation tools used globally. - Solving complex compiler optimizations problems to improve simulation performance. - Collaborating with cross-functional teams to achieve project milestones. - Pioneering new software architectures that set industry standards. What You’ll Need: - Strong hands-on experience in C/C++ based software development. - Deep understanding of design patterns, data structures, algorithms, and programming concepts. - Knowledge of ASIC design flow and EDA tools and methodologies. - Proficiency in Verilog, SystemVerilog, and VHDL HDL. Who You Are: - Highly enthusiastic and energetic team player with excellent communication skills. - Strong desire to learn and explore new technologies. - Effective problem-solver with a keen analytical mind. - Experienced in working on Unix/Linux platforms. - Adept at using developer tools such as gdb and Valgrind. The Team You’ll Be A Part Of: You will be part of the performance team in Digital Simulation. You will work closely with both local and global teams to drive technological advancements and achieve project goals. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

Backend Developer (Rust, Startups), YRAL Skills Required - Rust Please share Github link in resume Company Size - Startup / Small Enterprise Experience Required - 3 - 7 years Working Days - 5 days/week Office Location - Remote Working Role & Responsibilities You will be working with the Rust compiler and will be responsible for compiling to alternate targets such as WebAssembly You will be exposed with TDD for unit testing individual functions and integration testing for testing publicly exposed APIs Working with a Git style workflow where every commit deploys to a stagingenvironment and merged pull requests deploy to production Setting up CI/CD pipelines for testing and deployment (canary, staging) using Github actionsaccording to project needs Developing software in Rust Maintaining and improving existing rust codebases. Ideal Candidate Excited about working with Rust 4 -7 years of experience in shipping production applications B.Tech in Computer Science Engineering from Tier 1 Colleges only Entrepreneurial mindset with strong decision-making skills Ability to move quickly without breaking things too much (we are dreamers) Ability to work under immense pressure which is balanced by a sense of responsibility and ownership About YRAL TechnologyYRAL is on a mission to empower users and creators to monetise their time spent on social media. Through gamification and Play-to-Earn mechanics, we incentivize active participation and reward your time.We're a fully on-chain SocialFi project built on the ICP blockchain, we decentralized in July 2023 via SNS. Founded by startup veterans, YRAL is undergoing rapid expansion and boasts a user base of over 150,000.We're growing our team as we embark on this exciting journey in the world of web3. Here's how you can be part of it: 1. Open positions: We have opportunities for experienced professionals, apply for current openings on our page. 2. Live Projects for Students: Start contributing through live projects even if you're a student. 3. Mentorship program: Launch your content creation journey with our guidance. 4. Events: Collaborate, host events, and network with like-minded individuals.Connect with us - Twitter: https://twitter.com/Yral_app Discord: https://discord.gg/B82GMtb7wn Instagram - https://www.instagram.com/yral_app/ GitHub: https://github.com/go-bazzinga/product-roadmap/discussions Linkedin Page : https://www.linkedin.com/company/yral-app/

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a seasoned engineer with a passion for pushing the boundaries of technology. With 3 -7 years of experience, you bring a wealth of knowledge in software architecture. You excel in C/C++ software development, digital simulation, compiler optimizations and your strong background in design patterns, data structures, and algorithms sets you apart. Your expertise in Verilog, SystemVerilog, coupled with your experience in Unix/Linux platforms, makes you a valuable asset. You are well-versed in developer tools like gdb and Valgrind. Your analytical and problem-solving skills are top-notch, and you are always eager to learn and explore new technologies. As a highly enthusiastic and energetic team player, you are ready to go the extra mile to achieve success. What You’ll Be Doing: Designing, developing, and troubleshooting core algorithms for compiler. - Collaborating with local and global teams to enhance runtime performance for verilog compiler. - Engaging in pure technical roles focused on software development and architecture. - Utilizing your knowledge of digital simulation flows and EDA tools to drive innovation. - Leveraging your expertise in Verilog, SystemVerilog, and VHDL to develop cutting-edge solutions. The Impact You Will Have: Driving technological innovation in chip design and verification. - Enhancing the performance and quality of simulation tools used globally. - Solving complex compiler optimizations problems to improve simulation performance. - Collaborating with cross-functional teams to achieve project milestones. - Pioneering new software architectures that set industry standards. What You’ll Need: Strong hands-on experience in C/C++ based software development. - Deep understanding of design patterns, data structures, algorithms, and programming concepts. - Knowledge of ASIC design flow and EDA tools and methodologies. - Proficiency in Verilog, SystemVerilog, and VHDL HDL. Who You Are: Highly enthusiastic and energetic team player with excellent communication skills. - Strong desire to learn and explore new technologies. - Effective problem-solver with a keen analytical mind. - Experienced in working on Unix/Linux platforms. - Adept at using developer tools such as gdb and Valgrind. The Team You’ll Be A Part Of: You will be part of the performance team in Digital Simulation. You will work closely with both local and global teams to drive technological advancements and achieve project goals. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

Senior Software Developer (f/m/d) Identifier: INST-SSD-TL Location: Trivandrum For our office in Trivandrum, dSPACE is looking for creative and motivated professionals. You will work on exciting and technologically cutting-edge product development projects, in the areas of control prototyping, code generation and Hardware-In-the-Loop (HIL) simulation. We are currently offering a position as a Senior Software Developer for the development of a product solution that operates within a model-based development environment using MATLAB®, Simulink®, and Stateflow®. As part of the development team, you will be responsible for the development and maintenance of Processor-in-the-Loop (PIL) functionality, which enables the early validation of software components on the processor that will later be used in the ECU. You will also be responsible for developing and maintaining the necessary firmware to integrate new components as part of the PIL functionality. In doing so, you can expect a variety of exciting, challenging, and diverse tasks that you will solve together as a team. Your future colleagues are looking forward to working with you on a wide range of challenging subjects. During the induction period, your colleagues will support you to familiarize you with our products and tasks. Your Tasks • You develop and enhance software components within an experienced development team • You coordinate new functionalities with stakeholders • You analyze microcontroller hardware with the supported compiler to realize the PIL functionality • You develop and maintain flash drivers and application interfaces to support PIL Simulation • You take ownership of features, independently implement new functionalities, and guide the team in solving complex problems Your Qualifications • You have a B.Tech/M.Tech university degree in Computer Science, Electronics and Communication or Electrical and Electronics Engineering, with a minimum of 5 years of relevant experience • You are eager to learn and open-minded • You have strong proficiency in C and C++, along with experience in Makefile script development • You possess deep working knowledge of embedded systems, various microcontroller platforms, and compilers • You have strong experience with MATLAB® and Simulink® You have good experience with testing methodologies for PIL Simulation framework or similar embedded validation environments • You are familiar with Azure® DevOps and Git for version control and CI/CD workflows • You have excellent English communication skills, both written and verbal What We Offer • A crucial role in a young, dynamic, and fast-growing team • A work environment that fosters trust, respect, and feedback • An onboarding buddy to integrate you smoothly into our team • Productivity and improvement time between the development sprints • A mentor helping you with your personal goals, technical progress in general and your software engineering skills in particular About us dSPACE is a market innovator and leader in providing solutions and systems for embedded controller software development in Automotive, Aerospace and Manufacturing industries. Founded in Germany in 1988, dSPACE employs over 2,600 dedicated people worldwide, who are committed to making the embedded controls software development process more efficient through innovative tools and services. Working at dSPACE means taking on challenging and varied tasks in a promising and exciting industry. With us, you have responsibility and can shape your personal career. A collegial and cooperative approach is as natural for us as the continuous development of your expertise. If you are ready to join our highly successful international team and take on the challenge of creating yet another success story in India – send us your application (including motivational letter, CV, copies of your academic degree, references from former employers) at career.tvm@dspace.in indicating your earliest possible entry date.

Job Description Location: NOIDA Exp-7-15Y We are seeking a highly skilled & experienced Synthesis & Static Timing Analysis (STA) expert to join our Flows & Methodologies Team. This role requires strong analytical skills, attention to detail, and the ability to work collaboratively with cross-functional teams. Proficiency in relevant EDA tools and a solid understanding of digital design principles are essential for success in these positions Scope of Responsibilities: As part of the Design Enablement team of the organization, you need to work closely with SoC cross functional teams to develop and define Synthesis & STA flow & methodology to meet SoC & IP level objectives on low geometry nodes (3/5/16nm) Your scope of work will cover tools and flows definition, requirement management for SoC designs You will work with EDA Vendors to proactively review latest tools and flows offerings in Synthesis & STA domains. Evaluate latest offerings and benchmark with organization used tools, flows, and methodologies. You will be an actor of change for deploying new tools & methodologies across the organization Qualifications Bachelor or Master or Ph.D. in Electronics Engineering and specialization in VLSI domain Good understanding of RTL, Synthesis, LEC, VCLP, Timing Constraints, UPF, Timing Closure & Signoff Experience with EDA tools like Genus, Fusion Compiler, Primetime, Tempus, Conformal Strong scripting skills for Automation and Flow development using PERL/TCL/Python. Can – do attitude, openness to new environment, people and culture Strong communication skills (written and verbal), problem solving, attention to detail, commitment to task, and quality focus Ability to work independently and as part of a team Company Description Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portfolio includes world leading MCUs, SoCs, Analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the world’s leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you. Renesas employs roughly 21,000 people in more than 30 countries worldwide. As a global team, our employees actively embody the Renesas Culture, our guiding principles based on five key elements: Transparent, Agile, Global, Innovative, and Entrepreneurial. Renesas believes in, and has a commitment to, diversity and inclusion, with initiatives and a leadership team dedicated to its resources and values. At Renesas, we want to build a sustainable future where technology helps make our lives easier. Join us and build your future by being part of what’s next in electronics and the world. Additional Information Renesas is an embedded semiconductor solution provider driven by its Purpose ‘ To Make Our Lives Easier .’ As the industry’s leading expert in embedded processing with unmatched quality and system-level know-how, we have evolved to provide scalable and comprehensive semiconductor solutions for automotive, industrial, infrastructure, and IoT industries based on the broadest product portfolio, including High Performance Computing, Embedded Processing, Analog & Connectivity, and Power. With a diverse team of over 21,000 professionals in more than 30 countries, we continue to expand our boundaries to offer enhanced user experiences through digitalization and usher into a new era of innovation. We design and develop sustainable, power-efficient solutions today that help people and communities thrive tomorrow, ‘ To Make Our Lives Easier .’ At Renesas, you can: Launch and advance your career in technical and business roles across four Product Groups and various corporate functions. You will have the opportunities to explore our hardware and software capabilities and try new things. Make a real impact by developing innovative products and solutions to meet our global customers' evolving needs and help make people’s lives easier, safe and secure. Maximize your performance and wellbeing in our flexible and inclusive work environment. Our people-first culture and global support system, including the remote work option and Employee Resource Groups, will help you excel from the first day. Are you ready to own your success and make your mark? Join Renesas. Let’s Shape the Future together. Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement . Job title Staff Engineer, Physical Design Department Engineering Location Noida Remote No Requisition ID 20019218_2025-03-01

Category Engineering Hire Type Employee Job ID 12393 Remote Eligible No Date Posted 29/07/2025 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a seasoned engineer with a passion for pushing the boundaries of technology. With 3 -7 years of experience, you bring a wealth of knowledge in software architecture. You excel in C/C++ software development, digital simulation, compiler optimizations and your strong background in design patterns, data structures, and algorithms sets you apart. Your expertise in Verilog, SystemVerilog, coupled with your experience in Unix/Linux platforms, makes you a valuable asset. You are well-versed in developer tools like gdb and Valgrind. Your analytical and problem-solving skills are top-notch, and you are always eager to learn and explore new technologies. As a highly enthusiastic and energetic team player, you are ready to go the extra mile to achieve success. What You’ll Be Doing: - Designing, developing, and troubleshooting core algorithms for compiler. - Collaborating with local and global teams to enhance runtime performance for verilog compiler. - Engaging in pure technical roles focused on software development and architecture. - Utilizing your knowledge of digital simulation flows and EDA tools to drive innovation. - Leveraging your expertise in Verilog, SystemVerilog, and VHDL to develop cutting-edge solutions. The Impact You Will Have: - Driving technological innovation in chip design and verification. - Enhancing the performance and quality of simulation tools used globally. - Solving complex compiler optimizations problems to improve simulation performance. - Collaborating with cross-functional teams to achieve project milestones. - Pioneering new software architectures that set industry standards. What You’ll Need: - Strong hands-on experience in C/C++ based software development. - Deep understanding of design patterns, data structures, algorithms, and programming concepts. - Knowledge of ASIC design flow and EDA tools and methodologies. - Proficiency in Verilog, SystemVerilog, and VHDL HDL. Who You Are: - Highly enthusiastic and energetic team player with excellent communication skills. - Strong desire to learn and explore new technologies. - Effective problem-solver with a keen analytical mind. - Experienced in working on Unix/Linux platforms. - Adept at using developer tools such as gdb and Valgrind. The Team You’ll Be A Part Of: You will be part of the performance team in Digital Simulation. You will work closely with both local and global teams to drive technological advancements and achieve project goals. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Join phData, a dynamic and innovative leader in the modern data stack. We partner with major cloud data platforms like Snowflake, AWS, Azure, GCP, Fivetran, Pinecone, Glean and dbt to deliver cutting-edge services and solutions. We're committed to helping global enterprises overcome their toughest data challenges. phData is a remote-first global company with employees based in the United States, Latin America and India. We celebrate the culture of each of our team members and foster a community of technological curiosity, ownership and trust. Even though we're growing extremely fast, we maintain a casual, exciting work environment. We hire top performers and allow you the autonomy to deliver results. 6x Snowflake Partner of the Year (2020, 2021, 2022, 2023, 2024, 2025) Fivetran, dbt, Atlation, Matillion Partner of the Year #1 Partner in Snowflake Advanced Certifications 600+ Expert Cloud Certifications (Sigma, AWS, Azure, Dataiku, etc) Recognized as an award-winning workplace in US, India and LATAM As a Staff Software Engineer on the Product Engineering team, you will: Design, implement, and maintain high-quality code to meet project requirements Take ownership of the code that you write: you understand it, you are intentional about the choices you make, and you aggressively hunt down bugs Mentor other engineers with the goal of moving them to the next level Learn from other engineers, even those with less experience Own large features from design to implementation, guiding mid and junior engineers through the lifecycle Lead discussions with the team to brainstorm solutions and address technical issues Resolve user issues with a keen focus on root cause analysis, thinking strategically about incorporating preventative measures into our software, builds, and tests to prevent future issues Influence coding standards and design practices to ensure consistency and quality across projects Qualifications For The Ideal Candidate Experience: 8 to 12+ years. JVM Experience: You are an expert in Java and/or Kotlin, with a deep understanding of the JVM ecosystem. Build Systems: You have experience creating and maintaining custom builds in Gradle or Maven. Maybe you even enjoy it. Problem-Solving: You enjoy solving problems so much that you seek them out, or maybe even fabricate them yourself just so you can solve them. Collaboration and Communication: You are equally capable of explaining your ideas verbally as you are writing them down. When you disagree with others, you raise your concerns and work through the issues constructively. It frustrates you when others do not provide relevant information, so you strive to communicate relevant details to others clearly and effectively. Strong desire to learn and grow: As a team, we are always learning new technologies and challenging ourselves to grow. You need to enjoy learning if you are going to keep up. Proficiency with Large Codebases: Our code base is fairly large, and covers a wide variety of domains. Not only can you navigate large codebases easily, but you also have opinions on how they should be structured to improve developer experience. CI/CD and Automation: Boring work is something you really want to avoid, and your favorite way to avoid it is with automation. Cloud Infrastructure Experience: We deploy our infrastructure in AWS on Linux. You need a solid understanding of cloud infrastructure, troubleshooting techniques, and maybe some architecture experience. If you do not know the right answer, you at least know how to find it. Database Proficiency: Writing code that interacts with databases, writing SQL, and generally working with data should come naturally to you. Algorithms: Algorithms are second nature for you. You know when to sort a collection or when to wait. You know the difference between O(n) and O(n^2) time complexity and why that matters in a hot section of code. Data Structures: Your understanding of data structures is so deep that you can instinctively pick a list, set, map, or some other data structure based on the context, and you are usually right. Trees and graphs do not scare you. You know when and how to use these data structures effectively in real applications. Language Parsing or Compiler Experience: Bonus points if you have experience with custom parsers or compilers, especially if they used ANTLR. phData celebrates diversity and is committed to creating an inclusive environment for all employees. Our approach helps us to build a winning team that represents a variety of backgrounds, perspectives, and abilities. So, regardless of how your diversity expresses itself, you can find a home here at phData. We are proud to be an equal opportunity employer. We prohibit discrimination and harassment of any kind based on race, color, religion, national origin, sex (including pregnancy), sexual orientation, gender identity, gender expression, age, veteran status, genetic information, disability, or other applicable legally protected characteristics. If you would like to request an accommodation due to a disability, please contact us at People Operations.

Job Title CSE Department Assistant Professor, Associate Professor & Professor at Chennai Campus Location Chennai, Tamilnadu Required Number 4 Qualification Ph.D. (CSE/IT), B Tech, M Tech from a reputed college/ institute with good research/ teaching experience will be considered. Retired faculty from IIT/ NIT/ reputed state Universities may apply for Adjunct Faculty/Visiting Faculty positions. Job description Teaching and research experience in following areas – Artificial Intelligence / Machine Learning / Deep Learning / Big Data / Cloud Computing / Data Science / Software Engineering – Agile Methodologies and working knowledge in DevOps / Theory of Computation/ Compiler Design / Cyber-Physical Systems / Cryptography/ Network Security / Ethical Hacking / Cyber Security/ Signal and Image Processing Skills Required Competitive Programming background in Python, C/C++, JAVA; and Good Scientific Paper Writing (either conference or journal). The candidate should have adequate experience in research in a specific area of specialization, and publications in top-tier journals. Experience Candidates having experience above 5 years in teaching and research. Experience Required Last date to apply July 31, 2025 For details contact hrase.chn@ch.amrita.edu

Company Qualcomm India Private Limited Job Area Engineering Group, Engineering Group > Hardware Engineering General Summary Experience in Logic design /micro-architecture / RTL coding is a must. Must have hands on experience with SoC design and integration for SoCs. Experience in Verilog/System-Verilog is a must. Should have knowledge of AMBA protocols - AXI, AHB, APB, SoC clocking/reset/debug architecture and peripherals like USB, PCIE and SDCC. Understanding of Memory controller designs and microprocessors is an added advantage Hands on experience in constraint development and timing closure Work closely with the SoC verification and validation teams for pre/post Silicon debug Hands on experience in Low power SoC design is required Experience in Synthesis / Understanding of timing concepts for ASIC is required. Hands on experience in Multi Clock designs, Asynchronous interface is a must. Experience creating pad ring and working with the chip level floorplan team is an added advantage Experience in using the tools in ASIC development such as Lint, CDC, Design compiler and Primetime is required. Minimum Qualifications Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. 3-6 yrs of experience Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Company Qualcomm India Private Limited Job Area Engineering Group, Engineering Group > Hardware Engineering General Summary Experience in Logic design /micro-architecture / RTL coding is a must. Must have hands on experience with SoC design and integration for complex SoCs. Experience in Verilog/System-Verilog is a must. Should have knowledge of AMBA protocols - AXI, AHB, APB, SoC clocking/reset/debug architecture and peripherals like USB, PCIE and SDCC. Understanding of Memory controller designs and microprocessors is an added advantage Hands on experience in constraint development and timing closure Work closely with the SoC verification and validation teams for pre/post Silicon debug Hands on experience in Low power SoC design is required Experience in Synthesis / Understanding of timing concepts for ASIC is required. Hands on experience in Multi Clock designs, Asynchronous interface is a must. Experience creating pad ring and working with the chip level floorplan team is an added advantage Experience in using the tools in ASIC development such as Lint, CDC, Design compiler and Primetime is required. Minimum Qualifications Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. Preferred Qualifications 2-9 years of experience in SoC design Educational Requirements: 2+ years of experience with a Bachelor’s/ Master’s degree in Electrical engineering Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail myhr.support@qualcomm.com or call Qualcomm's toll-free number found here . Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Company Qualcomm India Private Limited Job Area Engineering Group, Engineering Group > Hardware Engineering General Summary As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. Job Role Work on Logic & Physical aware Synthesis with Low Power, QoR optimization, STA and Netlist Signoff flows. Work on Logic equivalence check and low power check clean up. Work on constraints development by interacting with designers and help in porting constraints from block to top-level. Should be able to handle multiple projects by leading a team of 3 to 5 members and deliver. Should be able to lead implementation flow development effort independently by working closely with design team and EDA vendors. Should be able to drive new tool evaluation, methodology refinement for PPA optimization. Should be sincere, dedicated and willing to take up new challenges. Skill Set Proficiency in Python/Tcl. Familiar with Synthesis & STA tools (Fusion Compiler/Genus, Primetime/Tempus). Fair knowledge in LEC, LP signoff tools. Proficient in VLSI front end design steps- Verilog/VHDL, Synthesis, QoR optimization & Equivalence Checking Familiarity with standard software engineering practices like Version Control, Configuration Management. Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Company Description Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portfolio includes world leading MCUs, SoCs, Analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the world’s leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you. Renesas employs roughly 21,000 people in more than 30 countries worldwide. As a global team, our employees actively embody the Renesas Culture, our guiding principles based on five key elements: Transparent, Agile, Global, Innovative, and Entrepreneurial. Renesas believes in, and has a commitment to, diversity and inclusion, with initiatives and a leadership team dedicated to its resources and values. At Renesas, we want to build a sustainable future where technology helps make our lives easier. Join us and build your future by being part of what’s next in electronics and the world. Job Description Location: NOIDA Exp-7-15Y We are seeking a highly skilled & experienced Synthesis & Static Timing Analysis (STA) expert to join our Flows & Methodologies Team. This role requires strong analytical skills, attention to detail, and the ability to work collaboratively with cross-functional teams. Proficiency in relevant EDA tools and a solid understanding of digital design principles are essential for success in these positions Scope Of Responsibilities As part of the Design Enablement team of the organization, you need to work closely with SoC cross functional teams to develop and define Synthesis & STA flow & methodology to meet SoC & IP level objectives on low geometry nodes (3/5/16nm) Your scope of work will cover tools and flows definition, requirement management for SoC designs You will work with EDA Vendors to proactively review latest tools and flows offerings in Synthesis & STA domains. Evaluate latest offerings and benchmark with organization used tools, flows, and methodologies. You will be an actor of change for deploying new tools & methodologies across the organization Qualifications Bachelor or Master or Ph.D. in Electronics Engineering and specialization in VLSI domain Good understanding of RTL, Synthesis, LEC, VCLP, Timing Constraints, UPF, Timing Closure & Signoff Experience with EDA tools like Genus, Fusion Compiler, Primetime, Tempus, Conformal Strong scripting skills for Automation and Flow development using PERL/TCL/Python. Can – do attitude, openness to new environment, people and culture Strong communication skills (written and verbal), problem solving, attention to detail, commitment to task, and quality focus Ability to work independently and as part of a team Additional Information Renesas is an embedded semiconductor solution provider driven by its Purpose ‘ To Make Our Lives Easier .’ As the industry’s leading expert in embedded processing with unmatched quality and system-level know-how, we have evolved to provide scalable and comprehensive semiconductor solutions for automotive, industrial, infrastructure, and IoT industries based on the broadest product portfolio, including High Performance Computing, Embedded Processing, Analog & Connectivity, and Power. With a diverse team of over 21,000 professionals in more than 30 countries, we continue to expand our boundaries to offer enhanced user experiences through digitalization and usher into a new era of innovation. We design and develop sustainable, power-efficient solutions today that help people and communities thrive tomorrow, ‘ To Make Our Lives Easier .’ At Renesas, You Can Launch and advance your career in technical and business roles across four Product Groups and various corporate functions. You will have the opportunities to explore our hardware and software capabilities and try new things. Make a real impact by developing innovative products and solutions to meet our global customers' evolving needs and help make people’s lives easier, safe and secure. Maximize your performance and wellbeing in our flexible and inclusive work environment. Our people-first culture and global support system, including the remote work option and Employee Resource Groups, will help you excel from the first day. Are you ready to own your success and make your mark? Join Renesas. Let’s Shape the Future together. Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement.

Work location: Netherlands Sponsorship will be provided. About Us: At Dabster, we specialise in connecting top engineering talent with leading global companies. We are currently seeking an experienced Subsystem/SOC Integration Senior Engineer to join our client's team. Our goal is to deliver world-class recruitment solutions, helping our clients build the future of semiconductor innovation. Who Will You Work With: Our client is a globally recognised leader in semiconductor design and development, with teams based in Sophia Antipolis, France, and Cambridge, UK. You will work alongside industry experts focused on cutting-edge SoC and subsystem integration for next-generation products. About the Role: As a Subsystem/SOC Integration Senior Engineer , you will contribute to IP integration, RTL development, and design reviews as part of complex SoC and subsystem projects. You will support micro-architecture design, manage IP configurations, implement power intent using proprietary flows, and assist with synthesis and verification activities. This is a 6-month B2B contract with strong potential for extension, and the role is fully remote within the EU or UK, with occasional travel required for face-to-face meetings at client sites. Key Responsibilities: Develop and review micro-architecture based on final requirement specifications. Manage and render IP configurations per design requirements. Perform RTL coding and lead design reviews. Integrate IP at subsystem/SoC level in line with micro-architecture specifications. Implement power intent using customer-specific tools and flows. Support trial synthesis, update constraints, and perform LEC (logical equivalency checking). Provide verification and debug support. Preferred Skills: Strong experience in micro-architecture design and RTL coding using SystemVerilog. Proficient with synthesis tools like Design Compiler or Fusion Compiler. Hands-on experience in SDC (Synopsys Design Constraints) development. Ability to debug LEC failures and perform RTL/gate-level debug using tools such as Verdi. Strong analytical and problem-solving skills in IP and SoC design environments.

We’re Hiring – Physical Design Engineer Domain: Semiconductor | VLSI | Chip Design Required Skills: Proficiency in Floor Planning techniques. Expert practical experience with tools such as Innovus. Solid understanding of Fusion Compiler functionalities. Preferred Qualifications: Background in scripting languages including Tcl, Tk, or Perl. Knowledge of Physical Design workflows and methodologies. Previous experience working with advanced technology nodes (submicron, 28nm and below). Job Types: Full-time, Permanent Pay: ₹3,000,000.00 - ₹5,000,000.00 per year Schedule: Monday to Friday Application Question(s): End-to-end ownership of chip-level and block-level floor planning? Background in scripting languages including Tcl, Tk, or Perl? Expert practical experience with tools such as Innovus? Experience working with advanced technology nodes (submicron, 28nm and below). Location: Vishakhapatnam, Andhra Pradesh (Preferred) Work Location: In person

We’re Hiring – Physical Design Engineer Domain: Semiconductor | VLSI | Chip Design Required Skills: Proficiency in Floor Planning techniques. Expert practical experience with tools such as Innovus. Solid understanding of Fusion Compiler functionalities. Preferred Qualifications: Background in scripting languages including Tcl, Tk, or Perl. Knowledge of Physical Design workflows and methodologies. Previous experience working with advanced technology nodes (submicron, 28nm and below). Job Types: Full-time, Permanent Pay: ₹3,000,000.00 - ₹5,000,000.00 per year Schedule: Monday to Friday Application Question(s): End-to-end ownership of chip-level and block-level floor planning? Background in scripting languages including Tcl, Tk, or Perl? Expert practical experience with tools such as Innovus? Experience working with advanced technology nodes (submicron, 28nm and below). Location: Vishakhapatnam, Andhra Pradesh (Preferred) Work Location: In person

Location Bangalore, Karnataka, India Employment Type Full time Location Type Hybrid Department R&D - SW Systems Compensation IC5 $155.3K – $234.4K • Offers Equity • Offers Bonus The pay range below is for all roles at this level across all US locations and functions. Individual pay rates depend on a number of factors—including the role’s function and location, as well as the individual’s knowledge, skills, experience, education, and training. We also offer incentive opportunities that reward employees based on individual and company performance. This is in addition to our diverse package of benefits centered around the wellbeing of our employees and their loved ones. In addition to the usual Medical/Dental/Vision/401k, our inclusive rewards plan empowers our people to care for their whole selves. An investment in your future is an investment in ours. At d-Matrix , we are focused on unleashing the potential of generative AI to power the transformation of technology. We are at the forefront of software and hardware innovation, pushing the boundaries of what is possible. Our culture is one of respect and collaboration. We value humility and believe in direct communication. Our team is inclusive , and our differing perspectives allow for better solutions. We are seeking individuals passionate about tackling challenges and are driven by execution. Ready to come find your playground? Together , we can help shape the endless possibilities of AI. Location: Hybrid, working onsite at our Bangalore, India headquarters 3 days per week. What you will do: The role requires you to be part of the team that helps productize the SW stack for the d-Matrix AI compute engine. As part of the Software QA team, you will be responsible for the test automation development for d-Matrix components and products, and you will be responsible for maintaining and improving the test infrastructure for next-generation AI hardware. You have the logic to build and scale the test framework to deliver highly qualified software stacks and hardware products. As a part of the SW-QA team, you’ll be involved in leveraging the d-Matrix Gitlab CI/CD infrastructure and Pytest framework to achieve component and end-to-end qualification. You will be involved in developing large language model accuracy, benchmarking, and robustness testing using your own developed automation. You will work with global ML core kernel teams, compiler teams, runtime teams, hardware architecture experts, and machine learning model researchers during the qualification process. You also could contribute to the new ML/AI technologies. What you will bring: Bachelor's or master's degree in Computer Science, Electrical Engineering, or related degree with 7+ Years of Industry Experience Good knowledge of large language models and machine learning fundamentals Good knowledge of Python programming, Python Data Structures, and Linux environment Self-motivated team player Desired: Prior startup, small team experience Experience with Machine Learning models and their layers Experience with Deep Learning, Tensorflow, Transformers, and PyTorch testing Knowledge of Gitlab CI/CD infrastructure Equal Opportunity Employment Policy d-Matrix is proud to be an equal opportunity workplace and affirmative action employer. We’re committed to fostering an inclusive environment where everyone feels welcomed and empowered to do their best work. We hire the best talent for our teams, regardless of race, religion, color, age, disability, sex, gender identity, sexual orientation, ancestry, genetic information, marital status, national origin, political affiliation, or veteran status. Our focus is on hiring teammates with humble expertise, kindness, dedication and a willingness to embrace challenges and learn together every day. d-Matrix does not accept resumes or candidate submissions from external agencies. We appreciate the interest and effort of recruitment firms, but we kindly request that individual interested in opportunities with d-Matrix apply directly through our official channels. This approach allows us to streamline our hiring processes and maintain a consistent and fair evaluation of al applicants. Thank you for your understanding and cooperation.

We help the world run better At SAP, we enable you to bring out your best. Our company culture is focused on collaboration and a shared passion to help the world run better. How? We focus every day on building the foundation for tomorrow and creating a workplace that embraces differences, values flexibility, and is aligned to our purpose-driven and future-focused work. We offer a highly collaborative, caring team environment with a strong focus on learning and development, recognition for your individual contributions, and a variety of benefit options for you to choose from. What You'll Do Iterate rapidly, collaborating with product and design to launch the first versions of new products. Work with engineering teams in different geographic locations to design, debug, analyze, and resolve complex problems for customers and SAP internal stakeholders. Participate in code reviews, sharing your experience and best-practice knowledge with colleagues. Lead and drive, all aspects of development life cycle, including requirements verification, solution building and alignments with stakeholders, architectural design, implementation, and testing to meet quality criteria and processes to deliver best solutions to our customers. What You Bring You have a bachelor's degree in computer science or software engineering from a top-tier educational institute with 5 - 8 years of work experience. You have hands-on experience working with SAP Basis components and a good understanding of SAP Kernel. You have a working knowledge of relational databases / SQL and know how to produce high quality and testable code. Experience with the full life cycle of software development. You enjoy working with a diverse group of people with different expertise backgrounds and perspectives. Strong problem solving and communication skills. Passion to constantly learn on the job. Strong understanding of new and legacy C-compiler concepts. Strong understanding of C/C++ coding, as a plus familiarity with C++11 Operating system knowledge for LINUX, Windows, AIX, as a plus familiarity with POSIX and win32 AP Expertise in Google Robot Framework (GNU) Make experience Experience with code management systems. Hands-on experience with Perforce is a plus Meet Your Team The role provides opportunities to work on a wide stack of SAP technologies and products. Your tasks will include development for SAP Host Agent with a highly motivated team to enable security, alerting, monitoring, and high-availability capabilities for SAP customers worldwide. As part of this job, you will work closely with SAP and SAP Partner technology layers, like operating and database management systems. You will also build-up expertise for hybrid and cloud operations in Hyperscaler environments, such as Microsoft Azure, Google Cloud and AWS. The SAP ABAP Platform unit carries the world's enterprise application space and defines an industry standard, ensuring a dedicated ABAP environment in the SAP Business Technology Platform #DevT2 Bring out your best SAP innovations help more than four hundred thousand customers worldwide work together more efficiently and use business insight more effectively. Originally known for leadership in enterprise resource planning (ERP) software, SAP has evolved to become a market leader in end-to-end business application software and related services for database, analytics, intelligent technologies, and experience management. As a cloud company with two hundred million users and more than one hundred thousand employees worldwide, we are purpose-driven and future-focused, with a highly collaborative team ethic and commitment to personal development. Whether connecting global industries, people, or platforms, we help ensure every challenge gets the solution it deserves. At SAP, you can bring out your best. We win with inclusion SAP’s culture of inclusion, focus on health and well-being, and flexible working models help ensure that everyone – regardless of background – feels included and can run at their best. At SAP, we believe we are made stronger by the unique capabilities and qualities that each person brings to our company, and we invest in our employees to inspire confidence and help everyone realize their full potential. We ultimately believe in unleashing all talent and creating a better and more equitable world. SAP is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to the values of Equal Employment Opportunity and provide accessibility accommodations to applicants with physical and/or mental disabilities. If you are interested in applying for employment with SAP and are in need of accommodation or special assistance to navigate our website or to complete your application, please send an e-mail with your request to Recruiting Operations Team: Careers@sap.com For SAP employees: Only permanent roles are eligible for the SAP Employee Referral Program, according to the eligibility rules set in the SAP Referral Policy. Specific conditions may apply for roles in Vocational Training. EOE AA M/F/Vet/Disability Qualified applicants will receive consideration for employment without regard to their age, race, religion, national origin, ethnicity, age, gender (including pregnancy, childbirth, et al), sexual orientation, gender identity or expression, protected veteran status, or disability. Successful candidates might be required to undergo a background verification with an external vendor. Requisition ID: 432356 | Work Area: Software-Design and Development | Expected Travel: 0 - 10% | Career Status: Professional | Employment Type: Regular Full Time | Additional Locations: .

Overview: WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ Responsibilities: SMTS S OFTWARE DEVELOPMENT ENG INEER THE ROLE: AMD is looking for an influential software engineer who is passionate about improving the performance of key applications and benchmarks . You will be a member of a core team of incredibly talented industry specialists and will work with the very latest hardware and software technology. THE PERSON: The ideal candidate should be passionate about software engineering and possess leadership skills to drive sophisticated issues to resolution. Able to communicate effectively and work optimally with different teams across AMD. KEY RESPONSIBILITIES: Design and Develop ML Compilers Lead the development of machine learning compilers specifically designed for AMD Neural Processing Units (NPUs). Collaborate with cross-functional teams to seamlessly integrate machine learning solutions into existing workflows and systems. Performance optimization Optimize the ML compiler to improve the performance of machine learning models on the Neural Processing Unit (NPU). Propose ideas to further enhance efficiency and model execution speed Break down complex features into manageable tasks to facilitate development and tracking and develop test plans for new features to ensure quality and coverage. Guide and support team members in achieving their project goals while facilitating their professional growth Project execution and delivery Ensure high-quality and timely project delivery PREFERRED EXPERIENCE: Proven ability to effectively solve complex problems. Knowledgeable in machine learning operators and data movement (tiling) strategies Familiar with software development tools and processes, including debuggers, source code control systems like GitHub, and profilers. Proficiency in object-oriented programming, with a strong preference for C/C++ languages. Ability to write high quality code with keen attention to detail Experienced in Linux and Windows development environments Excellent communication skills, with a proven ability to motivate and lead teams effectively ACADEMIC CREDENTIALS: Bachelor’s or Master's degree in Computer Science, Computer Engineering, Electrical Engineering, or equivalent #LI-NR1 Qualifications: Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

About Blaize Blaize provides a full-stack programmable processor architecture suite and low-code/no-code software platform that enables AI processing solutions for high-performance computing at the edge and in the data center. Blaize delivers real-time insights at low power, high efficiency, and minimal cost—driving next-gen AI adoption across industrial, automotive, and smart infrastructure markets. With $330M+ raised from investors including DENSO, Mercedes-Benz AG, Samsung, and Franklin Templeton, Blaize is a global team headquartered in California with branches in India, the UK, Middle East—and now growing its strategic presence in East Asia. JOB DESCRPTION: We are seeking a highly skilled ML Graph Compiler Engineer to join our team. The ideal candidate will have a strong background in C++ and experience in developing and optimizing graph compilers for machine learning models. You will work closely with our hardware and software teams to enhance the performance and efficiency of our ML frameworks, focusing on native parallel processing hardware and neural network optimizations JOB RESPONSIBLITIES Design, develop, and optimize graph compilers for machine learning models. Implement compiler optimizations such as operator fusion, memory management, and code generation. Develop and optimize kernels in Clang C++ (Clcpp) and assembly for neural networks. Collaborate with hardware engineers to integrate and optimize code for native parallel processing hardware. Analyze and improve the performance of ML models on Blaize hardware platforms. Maintain and extend existing compiler infrastructure. EDUCATION AND EXPERIENCE A bachelor’s/master’s degree in computer science 5+ years hands-on experience in software development REQUIRED KNOWLEDGE, SKILLS, AND ABILITIES Strong experience in C++ programming, including modern C++ standards (C++11/14/17). Hands on experience on Python Strong understanding of algorithms and data structures. Experience with debugging and profiling tools to analyze and optimize code performance. Hands on experience in any of the ML graph compiler framework. Experience in developing and optimizing kernels in Clang C++ (Clcpp) and assembly is a plus Knowledge of native parallel processing hardware architectures and optimization techniques is a plus MANDATORY SKILLS Experience on C/C++, Python, LLVM, OpenCLC++, ML framework SOFT SKILLS Strong analytical skills and ability to approach complex problems methodically Ability to work independently and collaborate effectively with the teams COMMUNICATION SKILLS Strong written and verbal communication skills Ability of explain complex technical concepts to non-technical stakeholders Blaize is an equal opportunity employer. We pride ourselves on having a diverse workforce and we do not discriminate against any employee or applicant because of race, creed, color, religion, gender, sexual orientation, gender identity/expression, national origin, disability, age, genetic information, veteran status, marital status, pregnancy or related condition, or any other basis protected by law. We respect the gender, gender identity, and gender expression of our applicants and employees, and we honor requests for preferred pronouns. It is our policy to comply with all applicable national, state, and local laws pertaining to nondiscrimination and equal opportunity.

Hyderabad, India Who we are Kinara is a Bay Area-based venture backed company. Our architecture is based on research done at Stanford University by Rehan Hameed and Wajahat Qadeer under the guidance of legendary Prof. Mark Horowitz (http://www-vlsi.stanford.edu/~horowitz/) and Prof. Christos Kozyrakis (http://csl.stanford.edu/~christos/). What we do Our game-changing AI solutions revolutionize what people and businesses can achieve. Ara inference processors combined with our SDK deliver unrivalled deep learning performance at the edge to accelerate and optimize real-time decision making where every millisecond is critical, and power efficiency is a must. Kinara solutions embed high- performance AI into edge devices to create a smarter, safer, and more enjoyable world. Edge AI is on the brink of a boom, and Kinara is looking forward to playing a significant role in it. Job Summary We are seeking an experienced developers for our kernel development team focused on building and optimizing AI/ML operators using our specialised Instruction Set Architecture (ISA). In this role, you will be responsible for design, development, and performance tuning of core kernel components that directly influence the efficiency and reliability of AI/ML workloads on our custom hardware. You will work closely with compiler teams, hardware architects, and application developers to deliver an operator that maximizes performance while meeting stringent accuracy and latency requirements. Key Responsibilities Design and development of core kernel modules, optimized for both performance and energy efficiency under AI/ML workloads. Design and development of advanced performance profiling/optimization and debugging tools to ensure low latency. Analyse kernel performance, identify bottlenecks, and implement optimizations at the software and feedback to the hardware for next generation improvements. Ensure to follow and propose industry best practices for code quality, performance testing, and validation of kernels. Collaborate with hardware architects, compiler teams to align the kernel design with the underlying ISA capabilities and seamless integration of AIML models. Stay current on emerging trends in ISA design, low-level programming, and AI/ML hardware acceleration. Ensure that documentation of the kernel components is made. Necessary Qualifications Bachelor’s or Master’s degree in Computer Science, Electrical/Computer Engineering, or a related field. Work experience in C/C++ is required and python is plus. 3+ years of industry experience in kernel or low-level system software development, with a strong background in optimizing performance for specialized hardware. Appropriate understanding of assembly language, computer architecture, ISA design/Development, and related performance optimization techniques. Demonstrated experience in using debugging and performance profiling tools (e.g., kernel debuggers, profilers, trace analyzers). Experience with developing AI/ML operators or accelerators in hardware-software co-design environments, is a plus. Experience of relevant industry standards and emerging trends in AI hardware acceleration is a plus. What We Offer An opportunity to lead innovative kernel development projects at the cutting-edge intersection of AI/ML and custom ISA design. A collaborative, dynamic work environment with access to state-of-the-art technology and methodologies. Competitive compensation, comprehensive benefits, and significant opportunities for professional growth and impact. Work culture We at Kinara have an environment that fosters innovation. Our team has technology experts who understand the big picture and mentors who coach passionate professionals to work on the most exciting challenges. We share responsibilities in everything we do, where every point of view is valued. Join us!

Job Description: Experience: 4+ years of Experience Tapeout experience in block level PnR implementation including synthesis for medium to complex blocks o Good to have experience in TSMC/Intel lower technology node(16/14nm or below) o Experience in independently analyzing/resolving congestion, timing issues and basic understanding of clock tree build o Basic Timing understanding to independently analyze timing paths o Experience in ICC2/Innovus/DC tools, Fusion compiler being added advantage o Basic equivalency check understanding. Good to have Conformal LEC experience. o Should have understanding of basic shell scripting, tool based TCL scripting to automate redundant tasks

You Are: You are an experienced and highly motivated professional with a strong technical background in standard cells layout design. You thrive in collaborative environments, working closely with cross-functional teams to deliver high-quality layout designs. Your expertise in industry-standard EDA tools, such as Cadence Virtuoso or Synopsys Custom Compiler, allows you to create and optimize complex layouts efficiently. You are well-versed in physical verification processes and design rule checks, ensuring the integrity and manufacturability of your designs. Your problem-solving skills and systematic approach enable you to tackle challenges effectively. You are a lifelong learner, staying updated with the latest industry trends and advancements in standard cells layout design. What You’ll Be Doing: Collaborate with cross-functional teams to develop and implement layout designs for digital circuits. Create and optimize layout designs using industry-standard EDA tools. Perform physical verification and design rule checks to ensure design integrity and manufacturability. Work closely with circuit designers to understand design specifications and constraints. Contribute to the development and enhancement of layout design methodologies and best practices. Stay updated with the latest industry trends and advancements in standard cells layout design. The Impact You Will Have: Ensure the delivery of high-quality layout designs for Logic Libraries IP development, integral to SOC subsystems. Drive innovation in layout design methodologies and best practices. Collaborate effectively with circuit designers to meet design specifications and constraints. Contribute to the overall success of the Logic Libraries IP group. What You’ll Need: Bachelor’s or master’s degree in electronics engineering or a related field. 3+ years of experience in standard cells layout design for digital circuits. Proficiency in industry-standard EDA tools, such as Cadence Virtuoso or Synopsys Custom Compiler. Exceptional knowledge of layout design methods, techniques, and methodologies. Experience with physical verification tools, such as ICC2. Excellent problem-solving and systematic skills. Ability to work effectively in a team-oriented environment. Good communication and interpersonal skills.

We are looking for experienced Systems SW Compiler Engineers for an exciting role in our PTX (Parallel Thread Execution) Compiler Development team. Join the PTX Compiler team and help drive PTX language design and PTX compiler evolution. PTX enables all GPU Computing applications including HPC, Deep Learning and Autonomous Driving. PTX provides a stable programming model and portable instruction set Architecture (ISA) for NVIDIA GPUs and used by all Compute programming languages compiled to NVIDIA GPUs. PTX is also used as a compiler target by various non-NVIDIA compilers. Work with NVIDIA GPU Architecture and CUDA Programming model teams to build abstractions to expose new GPU features in portable and performant ways in PTX ISA. PTX Compiler (PTXAS) apart from implementing PTX ISA is responsible for PTX Compiler Front End, interaction with optimizer and runtime aspects involving object files, debug information, linkers, loaders and Driver Compiler Interface. As a senior member of the team, you will be responsible for leading efforts to enhance PTX Compiler infrastructure to enhance it to support new compilation models for DL and Generative AI codes. You will be contributing towards evolving programming model for Generative AI and DL applications on GPUs. What You Will Be Doing Provide stewardship for PTX ISA and PTX Compiler infrastructure for Generative AI and DL. Collaborating with architecture and programming model teams to design and implement programming models for next generation GPUs. Working closely with others to help design compilation stack and strategies for AI and DL workloads. Collaborate closely with teams developing other related components to ensure compatibility, robustness and high-quality code generation. What We Need To See BS (or equivalent experience), MS or Ph.D. in Computer Science, Computer Engineering, or related fields. 4+ years of experience in the area of compiler front end, programming language designs, Compilers/Linkers. Superb analytical and C/C++ programming skills. Experience in any one area of compiler development including feature support, code generation and compiler infrastructure. Excellent and strong interactive, verbal and written communications skills. Understanding of any Processor ISA (GPU ISA a plus). Good track record of developing, driving and delivering software products. Ways To Stand Out From The Crowd Experience in Programming Languages design and drafting programming language standards. Knowledge of GPU development and compute APIs such as CUDA, and OpenCL. Development experience in LLVM IR, MLIR JR2000842