Posted:1 week ago|
Platform:
On-site
Full Time
Role Description Physical Design Engineer Exp:4 to 7 Handled Netlist to GDS II at block level for multiple tape outs. Hands-on experience on technology nodes like 28nm, 20nm, 14nm, 10nm Good knowledge of EDA tools from Synopsys , Cadence and Mentor, particularly experience with ICC, PTSI, Encounter, Nanoroute, Calibre, StarRC Hands-on experience in floor planning, placement optimizations, CTS and routing. Hands-on experience in block/top level signoff STA, physical verification (DRC/LVS/ERC/antenna) checks and other reliability checks(IR/EM/Xtalk) Exposure in physical implementation of timing/functional ECO’s Good knowledge of VLSI process and device characteristics TCL, perl scripting. Skills Physical Design,DRC,LVS,ERC,antenna Show more Show less
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My Connections UST
Bengaluru, Karnataka, India
Experience: Not specified
Salary: Not disclosed
Bengaluru, Karnataka, India
Experience: Not specified
Salary: Not disclosed