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Associate II - VLSI-Physical Design

Associate II - VLSI-Physical Design

UST Global

4 - 8 years

0 Lacs

karnataka

Posted:2 weeks ago| Platform: Shine logo

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Skills Required

rtl netlist floor planning clock tree synthesis routing static timing analysis physical verification eda tools perl cmos technology gdsii low power implementation placement optimizations reliability checks eco generation vlsi process tcl

Work Mode

On-site

Job Type

Full Time

Job Description

As a Physical Design Engineer at UST, you will be responsible for the following: - Expected to be very good in Basic Fundamentals of C-MOS technology - Able to handle RTL/Netlist to GDSII independently at block level and should have done multiple tape outs (Low power implementation is preferred) - Hands-on experience of working on Lower technology nodes like 5nm, 7nm, 10nm, 14nm, 16nm, 28nm etc. - Proficient in floor planning, placement optimizations, clock tree synthesis (CTS), and routing - Experienced in block/top level signoff Static Timing Analysis (STA), physical verification (DRC/LVS/ERC/antenna) checks, and other reliability checks (IR/EM/Xtalk) - Expertise in industry standard EDA tools from Synopsys, Cadence, and Mentor (ICC2, Fusion-Compiler, Design Compiler, Primetime, PTSI, IC Validator, Innovus, Genus, Tempus, Encounter, Nanoroute, Calibre, StarRC, Redhawk, voltage storm) - Exposure in DMSA flow for ECO generation and implementation - Good knowledge of VLSI process and scripting in TCL, perl UST is a global digital transformation solutions provider with over 30,000 employees in 30 countries. UST partners with clients from design to operation, embedding innovation and agility into their organizations to build for boundless impact, touching billions of lives in the process.,

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UST Global

Information Technology Services

Oxnard

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Associate II - VLSI-Physical Design

UST Global

karnataka

Associate II - VLSI-Physical Design

UST Global

karnataka

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Associate II - VLSI-Physical Design