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5.0 - 8.0 years

0 Lacs

Noida, Uttar Pradesh, India

On-site

Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around the world to develop highly innovative electronic products faster and more cost-effectively. Our customers use our tools to push the boundaries of technology and physics to deliver better products in the increasingly complex world of chip, board, and system design. About the group : It is a core R&D team working on Questa Verification IQ (QVIQ) which is a Siemens next generation web-based collaborative verification management product. Performance is key for us, so our tools leverage various grid systems & different CI tools to help our customers overcome their challenges arising from designs escalating in complexity. This role is based in Noida. But you’ll also get to visit other locations in India and globe, so you’ll need to go where this job takes you. In return, you’ll get the chance to work with teams impacting entire cities, countries, and the shape of things to come. We make real what matters! Key Responsibilities: Digital Verification Technologies (DVT) division seeks highly qualified Software Development Engineers with diverse profiles & knowledge to work as part of Questa Verification IQ product. In this role, you will: Contribute to crafting UX/UI that adheres to Siemens guidelines. Propose usability improvements. Developing an aesthetically pleasing UI. Build innovative product built on technology stack that uses Java Spring with Hibernate to collaborate with various SQL databases and Angular, CSS, HTML, and bootstrap for the front-end. Will work with a diverse global team and Contribute to the development and improvement of production-quality components, algorithms, and engines while supporting and improving existing codebases. Solve sophisticated, open-ended problems in collaboration with a senior group of engineers in a fast-paced and dynamic environment. Stay self-motivated, disciplined, and focused while driving innovation within the team! What We’re Looking For: Must-Have: We are looking for someone with proven expertise in software design and architecture. We are looking for candidates with 5-8 years of proven experience. We need someone with Bachelor’s or Master’s degree in Computer Science, Artificial Intelligence, Electrical Engineering, or a related technical field from an accredited institution. Strong understanding of SDLC and client/server architectures. Extensive experience with RESTful web services and full-stack development (Spring Boot, Node.js, Redux, Angular/React, JSON) Deep expertise in Java and Spring Framework with development on UNIX/Linux platforms. Strong analytical, problem-solving skills, and expertise in algorithms and data structures. Experienced with SQL and NoSQL databases. Good to have: Basic knowledge of digital electronics and HDL languages (SystemVerilog, Verilog, VHDL) Experience with Python, Hibernate/JPA, Figma, and Photoshop Exposure to simulation technologies and formal verification methodologies is a plus We are Siemens A collection of over 377,000 minds building the future, one day at a time in over 200 countries. We're dedicated to equality, and we encourage applications that reflect the diversity of the communities we work in. All employment decisions at Siemens are based on qualifications, merit and business need. Bring your curiosity and creativity and help us shape tomorrow! We offer a comprehensive reward package which includes a competitive basic salary, variable pay, other benefits, pension, healthcare and actively support working from home. We are an equal opportunity employer and value diversity at our company. We do not discriminate based on race, religion, color, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status. Transform the everyday #DVT Show more Show less

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3.0 - 15.0 years

0 Lacs

Bengaluru, Karnataka, India

On-site

Location: Bangalore, India In fast changing markets, customers worldwide rely on Thales. Thales is a business where brilliant people from all over the world come together to share ideas and inspire each other. In aerospace, transportation, defence, security and space, our architects design innovative solutions that make our tomorrow's possible. Thales is expanding its presence in India through the development a Group Engineering Competence Centre (ECC), reinforcing its position as a leader in all its markets. Launching in early 2019 in Bengaluru, the ECC will expand Thales’ footprint in its core business areas and cement its long-standing relationship with India. This ECC, the first of its kind in India, will focus on hardware, software and systems engineering capabilities for both the civil and defence sectors. India, and in particular Bengaluru, was chosen as the location for the new ECC due to the existing ecosystem – its proximity to the market, competence in research and development and abundance of skilled engineers. Both the needs of the local market and export markets will be catered for, meaning those who join Thales will have the opportunity of working on diverse projects with a high level of complexity, innovating in all the different markets we are present in. We’re inventing the future, right here, right now. By combining the curiosity to explore, the intelligence to question and the vision to create, together we’re transforming the world around us. FPGA Verification Thales India Engineering Competency Center (ECC) in Bangalore is seeking a FPGA professional to be part of Hardware engineering team. In this role, you will be responsible for Hardware subsystems architectural design, trade-off analysis, feasibility studies, Proposal preparation, detailed design and IVVQ for various Thales products (Defense and aerospace applications) including Obsolescence redesign. Qualifications: B. Tech in Electronics, Instrumentation engineering or equivalent with 3-15 years of relevant experience. Higher qualifications of Post-graduation is desirable. Avionics and Defense systems design is desirable. Responsibilities: Experience in Virtual Verification developing Test bench, Models, Checkers and Monitors using VHDL Preferable candidates with DO254 based VV execution Development of Virtual Verification Procedures and Virtual Verification Report Good hands on Python/Perl/TCL Collaborative work applying quality standards and internal processes Preparation of the associated project documentation and reviews Skills & experience: Must have strong experience in complete FPGA development life cycle (Technical feasibility, requirements, preliminary and detailed design, VV) Experience in Virtual Verification – VHDL Strong hands on Digital Design Good hands on Python/Perl/TCL Collaborative work applying quality standards and internal processes Preparation of the associated project documentation and reviews Must have experience to ensure the reporting progress of the project along with KPI Must have experience to manage risks and opportunities Must be rigorous, organized, autonomous and proactive, and motivated by a position within a multidisciplinary team. Must have demonstrated leadership skills on complex topics. At Thales we provide CAREERS and not only jobs. With Thales employing 80,000 employees in 68 countries our mobility policy enables thousands of employees each year to develop their careers at home and abroad, in their existing areas of expertise or by branching out into new fields. Together we believe that embracing flexibility is a smarter way of working. Great journeys start here, apply now! Show more Show less

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3.0 years

0 Lacs

Bengaluru, Karnataka, India

On-site

Role Description Role Proficiency: Ability to e xecute any small to mid size customer project in any field of VLSI Frontend Backend or Analog design with minimal supervision Outcomes Work as an individual contributor to own any one task of RTL Design/Module and provide support to junior engineers in Verification/PD/DFT/Circuit Design/Analog Layout/STA/Synthesis/Design Checks/Signoff etc. Independently analyze and complete the assigned task in the defined domain(s) successfully and on-time On time quality delivery approved by the project lead/manager Measures Of Outcomes Quality –verified using relevant metrics by Lead/Manager Timely delivery - verified using relevant metrics by Lead/Manager Reduction in cycle time and cost using innovative approaches Number of trainings attended Number of new projects handled Outputs Expected Quality of the deliverables: Ensure clean delivery of the design and module in-terms of ease in integration at the top level Meet functional spec / design guidelines 100% of the time without any deviation or limitation Documentation of the tasks and work performed Timely Delivery Meeting project timelines as requested by the program manager Support the team lead in intermediate tasks delivery Team Work Participation in team work; supporting team members/lead at the time of need Able to perform additional tasks in-case any team member(s) is not available Innovation & Creativity Automate repeated tasks to save design cycle time as a necessary approach Participation in technical discussion training forum Skill Examples Languages and Programming skills:a. System Verilog Verilog VHDL UVM C C++ Assembly Perl TCL/TK Makefile Spice (any one) EDA Tools: a. Cadence Synopsys Mentor tool sets (one or more)b. Simulators Lint CDC/RDC DC/RTL-C ICC/Innovus/Olympus ETS/TK/FS PT/Tempus Calibre etc. (any one) Technical Knowledge: (any one)a. Partially implement IP Spec Architecture Design Micro Architecture Functional Spec Test Plan Verificationb. Strong in Bus Protocol AHB/AXI/PCIe/USB/Ethernet/SPI/I2C Microprocessor architecturec. Strong knowledge in Physical Design / Circuit Design / Analog Layout d. Strong understanding of Synthesis DFT Floorplan Clocks P&R STA Extraction Physical Verificatione. Strong knowledge of Soft / Hard / Mixed Signal IP Design Processor Hardening FPGA Design Technology: CMOS FinFet FDSOI - 28nm / 22nm / 16ff / 10nm and below Strong communication skills Good analytical reasoning and problem-solving skills with attention to details Able to deliver the tasks on-time per quality guidelines and GANTT in every instance. Required technical skills and prior design knowledge to execute the assigned tasks Ability to learn new skills in-case required technical skills are not present to a level needed to execute the project Knowledge Examples Frontend / Backend / Analog Design:a. Project experience in any of the design by executing any one of – RTL Design / Verification / DFT / Physical Design / STA / PV / Circuit Design / Analog Layout etc.b. Strong understanding of the design flow and methodologies used in designing Understanding of the technical specs and assigned tasks: Understand the assigned tasks and have strong knowledge to execute the project tasks assigned by the client / manager as per shown skill Additional Comments Experience- 4+yrs Analog Layout Candidate should work independently on block level and chip level Analog layout design, coordinating with the circuit designer & the project lead. Candidate should have minimum 3+ years of hands-on experience in Analog layout. Custom layout experience in DAC, ADC, Band gap, Regulators, LDOs etc. Knowledge of finfet or technology exposure to 28nm or below is an added advantage. Full Understanding of IC fabrication and reliability issues. Full familiarity with Cadence-Virtuoso, PVS, ASSURA and Calibre tools. Outstanding written and verbal communication skills. Skills Analog Layout,Finfet,Cadence Virtuoso Show more Show less

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9.0 years

0 Lacs

Hyderabad, Telangana, India

On-site

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. At Micron, we transform how the world uses information to enrich life for all. The pace is fast, collaboration occurs on a regular basis, and innovation is expected. As a test platform development Engineer within the Non-Volatile Engineering (NVEG) Product Engineer team, you will develop and qualify low-cost in-house engineering test platforms and solve complex problems. This role requires deep understanding of test hardware and software along with NAND, UFS and PCIe protocol knowledge. You will be responsible to enable the PE test infrastructure and test platforms to test, debug and characterizing the NAND component and System products by closely working with the cross functional teams such as Test Engineering and System Integration, ASIC and FW teams and assist Qualification and Ramping of cutting-edge NAND and System Micron products. The candidate's responsibility is to design, develop and debug the VHDL or Verilog based application and have good knowledge of FPGA platform development lifecycle. Key Responsibilities Design, develop, and qualify product engineering test hardware, platforms, test firmware and software for non-volatile memory product bring up and debug. Develop efficient RTL design using Verilog or VHDL for FPGA implementation, ensuring optimal resource utilization. Drive complete FPGA design flow including synthesis, place and route, timing analysis and verification. Implement FPGA designs on hardware platforms using tools like Xilinx Vivado and optimize for performance, area and power and to create test bench and verification scripts. Debug and validate FPGA designs in hardware using tools such as oscilloscopes, logic analyzers, and signal tap. Optimize designs for speed, power, and resource usage based on the specific FPGA platform used. Collaborate with cross-functional teams, including Test Engineering & System Integration, ASIC, FW, Product Engineering and operations, to integrate FPGA designs with other system components. Provide engineering test solutions (HW & SW) for Product Development for NAND/System characterization and Silicon debug capabilities Drive and support new protocol enablement (SCA- Separate Command Address, ONFI, UFS, PCIe) and capability bring up Routinely communicate overall project status to leadership and cross functional product team Provide guidance through debug and resolution of product related issues Qualifications Successful candidates for this exciting opportunity will have: 9+ years of experience in RTL design, synthesis, timing closure, and verification methodologies. Knowledge of storage interface such as High Speed ONFI, UFS, PCIe, etc. Memory and Storage System behavior, architecture and design Working experience on NAND and non-volatile System products Experience with non-volatile memory, logic analyzers, oscilloscopes, and/or Automated Test Equipment (ATE) is preferred Experience working on firmware development using C/C++ and good understanding of scripting languages including TCL, Perl/Python. Familiar working on Unix/Linux terminal. Hands-on experience with hardware bring-up and debugging and Understanding of hardware schematic and layout. Excellent data analysis, problem solving, and decision-making skills Ability to work independently in a very fast paced environment and adapt to change Drive to determine root-cause and provide corrective action for product issues Self-motivated and enthusiastic in a challenging, dynamic environment Demonstrated ability to partner successfully with other groups to build strong peer relationships and achieve the best outcomes for Micron Education Position requires a minimum of a Bachelor's degree in Electrical, Electronics or Computer Engineering Course work in VLSI, semiconductor process is desirable, but not required About Micron Technology, Inc. We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all . With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products through our Micron® and Crucial® brands. Every day, the innovations that our people create fuel the data economy, enabling advances in artificial intelligence and 5G applications that unleash opportunities — from the data center to the intelligent edge and across the client and mobile user experience. To learn more, please visit micron.com/careers All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status. To request assistance with the application process and/or for reasonable accommodations, please contact hrsupport_india@micron.com Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards. Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron. Show more Show less

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10.0 years

4 - 9 Lacs

Hyderābād

On-site

SMTS Software Engineer – Machine Learning NPU Simulation Modeling Hyderabad, India Engineering 64752 Job Description WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ SMTS S OFTWARE DEVELOPMENT ENG INEER THE ROLE: AMD is looking for a talented, self-driven and motivated engineer to technically lead AIG’s Simulation Modeling projects working on AMD’s XDNA (AI Engine) architecture and the Vitis AI family of software tools. The XDNA is an industry leading architecture in terms of performance per watt and is used in AMD’s client and embedded devices as the primary engine for Machine Learning workloads. It is the hardware engine behind Windows Co-pilot on AMD devices. The team provides a fast-paced environment offering each of its members immense opportunity to interact with a wide variety of people including from other organizations like hardware designers, marketing, support, and even direct customer interaction, and truly learn and grow their skills and capabilities. THE PERSON: The ideal candidate should be passionate about software engineering and possess leadership skills to drive sophisticated technical issues to resolution. They should have demonstrated ability to identify technical problems, explore and propose viable options, and apply technical solutions. They should be able to excel in a global team environment with strong verbal and written communication skills. . KEY RESPONSIBILITIES: Vitis AI is AMD’s primary SDK that enables users to compile and run their ML models on the XDNA architecture. As a senior member of this high-performance team, the selected candidate will have responsibility to model the XDNA architecture in terms of functionality, accuracy and simulation speed. Candidate will work with compiler, runtime/driver teams to bring up latest AI models like CNNs, Transformers, StableDiffiusion, NLPs etc. on the XDNA simulator. This is a crucial part of AMD’s shift-left strategy for the successful bring up of new devices and day 0 enablement of models. Candidates would develop a deeper understanding of the various ML models, and how they are executed, identify performance bottlenecks and enable faster development. PREFERRED EXPERIENCE: Minimum 10 years of relevant work experience. Strong background in C++ based development and debug, dealing with multi-threaded infrastructure and performance optimization Experience in creating cycle accurate modeling of IPs in C++ or SystemC / TLM. Understanding of SoCs, and bringing up of software stack from driver to application on simulation model. Understanding hardware metrics like latency/throughput on any sub-system, and what changes impact those metrics. Experience in software development environment on both Linux and Windows is required. Experience in technologies like Virtual Platforms, SystemC/QEMU models, Emulation platforms, Hw/Sw co-design, and Performance analysis is desired. Familiarity with hardware languages like VHDL, Verilog and System Verilog for simulation using tools like Modelsim, VCS, Questa Sim is highly desired. ACADEMIC CREDENTIALS: Bachelor’s or Master's degree in Computer Science, Computer Engineering, Electrical Engineering, or equivalent #LI-PK1 AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

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4.0 years

3 - 9 Lacs

Noida

On-site

Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. Job Role Work on Logic & Physical aware Synthesis with Low Power, QoR optimization, STA and Netlist Signoff flows. Work on Logic equivalence check and low power check clean up. Work on constraints development by interacting with designers and help in porting constraints from block to top-level. Should be able to handle multiple projects by leading a team of 3 to 5 members and deliver. Should be able to lead implementation flow development effort independently by working closely with design team and EDA vendors. Should be able to drive new tool evaluation, methodology refinement for PPA optimization. Should be sincere, dedicated and willing to take up new challenges. Skill Set Proficiency in Python/Tcl. Familiar with Synthesis & STA tools (Fusion Compiler/Genus, Primetime/Tempus). Fair knowledge in LEC, LP signoff tools. Proficient in VLSI front end design steps- Verilog/VHDL, Synthesis, QoR optimization & Equivalence Checking Familiarity with standard software engineering practices like Version Control, Configuration Management. Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

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7.0 - 9.0 years

0 Lacs

Bengaluru / Bangalore, Karnataka, India

On-site

Introduction The Server IO logic design team delivers both proprietary and industry standard interfaces for IBMs POWER systems and Z Mainframe processors. We work on cutting edge technology and data rates from 2.5 Gbps to 64 Gbps or higher. Employees in this role capture product feature requirements and use them to create and maintain design documentation, such as functional specifications and high-level design documents, to develop logic for IBM hardware and technology products including server systems, storage systems and networking systems. They also ensure that the components are unit tested and ready to be integrated into the system product. Hardware logic developers also provide fixes to defects identified by the verification team or physical design team during the development life cycle. They also assist the lab team to characterize and validate the post-silicon hardware, and assist the firmware team in software procedure debug. Above all, we are looking for applicants who will thrive in an open, vibrant, flexible, fun-spirited, collaborative environment and desire creative freedom and an opportunity to work on high performing teams! Your role and responsibilities Job Duties: --A Server I/O logic design engineer should be able to --Work with stakeholders and others in a multidisciplinary team to define functional requirements and develop the solutions. --Develop logic (VHDL/Verilog) components and microcontroller code (C) functions. --Ensure that the components are block tested and debugged by waveform analysis, and ready to be integrated into the system product. --Provide fixes to defects identified by the verification team during the development life cycle. --Support the physical design team in closing the design under timing, power, and area constraints. --Support the lab team in characterizing the hardware in the bringup lab. Skills: Knowledge of High-speed IO or analog mixed-signal domain preferred, Prior experience in logic design, directed designer simulation testing and good communication skills (written and on the phone). Tools: VHDL, Verilog, C, Git, Linux OS, KornShell & BASH scripting Required education Bachelors Degree Preferred education Masters Degree Required technical and professional expertise A minimum of 7+ years of logic design experience in high-speed I/O or analog mixed-signal domain.Demonstrated experience in logic design.Proficiency in VHDL, Verilog hardware language.Familiarity with C programming Preferred technical and professional experience Prior IBM logic design experience or High-Speed IO logic design experience

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3.0 - 8.0 years

5 - 10 Lacs

Bengaluru

Work from Office

Develop verification environments for our ICs using Universal Verification Methodology (UVM); Job Description In your new role you will: create and define verification plans; develop verification environments for our ICs using Universal Verification Methodology (UVM); draw on test scenarios using SystemVerilog; verify functionality using the Constrained Random approach; develop assertions in SystemVerilog for formal verification; Interact with other disciplines, such as Concept and ApplicationEngineering, to define verification plans and strategies; provide proactive support to users of our verification flowenvironment; be responsible for our verification methods; Your Profile You are best equipped for this task if you have: You have successfully completed a university degree in Electrical Engineering, Computer Science or a similar academic discipline; You have at least 3 years of experience in Constrained-Random Metric-Driven Verification You have capabilities and experience in working withmicrocontroller-based ICs, as well as security and safety requirements; You have good know-how with UVM especially using SystemVerilog; Have knowledge of firmware and RTL design (VHDL); Ideally have knowledge of working with Verification IPs (VIPs) Contact: swati.gupta@infineon.com We are on a journey to create the best Infineon for everyone.

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1.0 - 4.0 years

3 - 7 Lacs

Mumbai, Thane

Work from Office

Should have experience of doing cold calling, email campaigns, data mining & database preparation using different tools Should have experience of working on LinkedIn to generate leads. Responsible for healthy pipeline to ensure that Sales team has adequate number of qualified opportunities to work upon Should do research to identify the pain area and customize the pitch accordingly to propose the relevant services Must have excellent communication skills. Job Competencies: Phone Skills Business Development Communication Skills Quality Focus

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10.0 - 20.0 years

37 - 70 Lacs

Pune, Bengaluru, Delhi / NCR

Hybrid

Job Title: Lead FPGA Prototyping Engineer (Automotive Domain) Company: Wafer Space (ACL Digital) Locations: Bangalore | Chennai | Pune | Noida Notice Period: Immediate to 15 Days ONLY Experience: 10 to 20 Years Job Type: Full-Time | In-House Development | R&D Project Key Skills: FPGA Prototyping, RTL Design, Verilog, SystemVerilog, VHDL, Xilinx, Zynq Ultrascale+, Intel FPGAs, Vivado, Quartus, SoC Integration, PCIe, DDR, Automotive, ISO 26262, Tcl, Python Job Description: Wafer Space (an ACL Digital company) is hiring a Lead FPGA Prototyping Engineer for a high-impact in-house Automotive product development project. This is a hands-on technical leadership role offering full design ownership and the opportunity to work from scratch on SoC/ECU FPGA prototyping . Responsibilities: Lead end-to-end FPGA prototyping for automotive SoC designs. Develop and implement RTL designs using Verilog/SystemVerilog/VHDL . Partition and integrate SoC designs across multiple FPGAs (Xilinx or Intel). Validate functional and performance metrics on FPGA boards. Work closely with software, verification, and hardware teams. Guide junior engineers and ensure design quality. Debug and bring up complex FPGA prototypes (using ILA, ChipScope, etc.). Automate design flows using scripting languages (Tcl, Python, Shell). Required Skills: Minimum 6 years of hands-on FPGA prototyping experience – Must Have Strong experience with Xilinx/Intel FPGA platforms Familiarity with Vivado, Quartus, Synplify, ModelSim, etc. Experience with high-speed protocols: PCIe, DDR, Ethernet, SPI, CAN Strong debugging and performance optimization skills Knowledge of Automotive standards (ISO 26262, ASPICE) is a plus Excellent communication, leadership, and ownership mindset Why Join Us? Drive core FPGA initiatives in a flagship automotive R&D program Full design ownership with scope for innovation and leadership Work in a collaborative and technically strong in-house development team Note: Candidates with notice periods exceeding 15 days will NOT be considered . If you're passionate about cutting-edge FPGA work in automotive and ready to join immediately or within 15 days, apply now and lead the change with Wafer Space (ACL Digital)!

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2.0 years

0 Lacs

Noida, Uttar Pradesh, India

On-site

Increasing digitalization and flexibility of production processes presents outstanding potential. In Digital Industries, we enable our customers to unlock their full potential and drive digital transformation with a unique portfolio of automation and digitalization technologies. From hardware to software to services, we’ve got quite a lot to offer. How about you? We blur the boundaries between industry domains by integrating the virtual and physical, hardware and software, design and manufacturing worlds. With the rapid pace of innovation, digitalization is no longer tomorrow’s idea. We take what the future promises tomorrow and make it real for our customers today. Join us - where your career meets tomorrow. Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around the world to develop highly innovative electronic products faster and more efficiently. Our customers use our tools to push the boundaries of technology and physics to deliver better products in the increasingly complex world of chip, board, and system design. Questa Simulation Product It is a core R&D team working on multiple verticals of Simulation. A very energetic and enthusiastic team of motivated individuals. This role is based in Noida. But you’ll also get to visit other locations in India and globe, so you’ll need to go where this job takes you. In return, you’ll get the chance to work with teams impacting entire cities, countries, and the shape of things to come. Responsibilities: We are looking for a highly motivated software engineer to work in the QuestaSim R&D team of the Siemens EDA Development responsibilities will include core algorithmic advances and software design/architecture. You will collaborate with a senior group of software engineers contributing to final production level quality of new components and algorithms and to create new engines and support existent code. Self-motivation, self-discipline and the ability to set personal goals and work consistently towards them in a dynamic environment will go far towards chipping in to your success. We Are Not Looking for Superheroes, Just Super Minds! We’ve got quite a lot to offer. How about you? Required Experience: We seek a graduate with at least 2 years of relevant working experience with B.Tech or M.Tech in CSE/EE/ECE from a reputed engineering college. Proficiency of C/C++, algorithm and data structures. Compiler Concepts and Optimizations. Experience with UNIX and / or LINUX platforms is vital. Basic Digital Electronics Concepts We value your knowledge of Verilog, System Verilog, VHDL Experience in parallel algorithms, job distribution. Understanding of ML/AI algorithms and their implementation in data-driven tasks Exposure to Simulation or Formal based verification methodologies would be a plus! The person should be self-motivated and can work independently. Should be able to guide others, towards project completion. Good problem solving and analytical skills We are Siemens A collection of over 377,000 minds building the future, one day at a time in over 200 countries. We're dedicated to equality, and we encourage applications that reflect the diversity of the communities we work in. All employment decisions at Siemens are based on qualifications, merit and business need. Bring your curiosity and creativity and help us shape tomorrow! We offer a comprehensive reward package which includes a competitive basic salary, variable pay, other benefits, pension, healthcare and actively support working from home. We are an equal opportunity employer and value diversity at our company. We do not discriminate based on race, religion, color, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status. #DVT Show more Show less

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3.0 years

0 Lacs

Noida, Uttar Pradesh, India

On-site

Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around the world to develop highly innovative electronic products faster and more cost-effectively. Our customers use our tools to push the boundaries of technology and physics to deliver better products in the increasingly complex world of chip, board, and system design. This role is based in Noida . But you’ll also get to visit other locations in India and globe, so you’ll need to go where this job takes you. In return, you’ll get the chance to work with teams impacting entire cities, countries, and the shape of things to come. We make real what matters! This is your role This role involves developing and implementing emulation test plans to validate sophisticated semiconductor products. The engineer will leverage hardware description languages such as Verilog and VHDL to design, implement, and debug emulation models. Teamwork is a key aspect of this role, as it requires close coordination with design, verification, and software teams to troubleshoot and resolve technical issues optimally. The position plays a meaningful role in ensuring the functionality, performance, and reliability of products before they reach the market. Key Responsibilities Develop and implement emulation test plans for product validation. Use HDL languages (Verilog, VHDL) to design, implement, and debug emulation models. Collaborate with design, verification, and software teams to identify and resolve issues. Requirement We are looking for candidates with Bachelor’s or Master’s degree in Electrical/Electronics Engineering or a related field. We are seeking Candidates with minimum 3+ Years of Experience. We need someone who has experience with HDL languages (Verilog, VHDL) and digital design. Strong background in emulation and validation of complex digital systems. Excellent problem-solving skills and attention to detail! Show more Show less

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5.0 - 10.0 years

3 - 7 Lacs

Noida, Uttar Pradesh, India

On-site

Participate in development of verification test plan, verification environment documentation, and test environment usage documentation. Evaluate and exercise various aspects of the development flow. May include such items as Verilog/SystemVerilog development, functional simulation, constraint development, test planning, behavioral modeling, and verification coverage metrics (functional coverage and code coverage). Collaborate with architects, designers, VIP team, and peers to accomplish all verification goals. Identify design problems, possible corrective actions, and/or inconsistencies on documented functionality. Adhere to quality standards and good test and verification practices. May work to coach junior engineers and help them in debugging complex problems. Key Qualifications: Proven desire to learn and explore new state-of-the-art technologies. Demonstrate good written and spoken English communication skills. Demonstrate good review and problem-solving skills. Knowledgeable with Verilog, VHDL, and/or SystemVerilog. Knowledgeable with scripting languages (BASH/TCSH/PERL/PYTHON/TCL) is a plus. Understanding of verification methodology such as UVM. Good organization and communication skills. 5+ years of relevant experience.

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8.0 - 9.0 years

7 - 8 Lacs

Noida, Uttar Pradesh, India

On-site

* Identify verification environment requirements from its various sources (Specifications, Design functionality, Interfaces, etc ) * Generate verification test plan, verification environment documentation and test environment usage documentation * Define, develop, and verify complex UVM verification environments * Evaluates and exercises various aspects of the development flow. May include such items as Verilog/SystemVerilog development, functional simulation, constraint development, test planning, behavioral modelling, and verification coverage metrics (functional coverage and code coverage) * Collaborate with architect, designers , VIP team to accomplish tasks. * Identify design problems, possible corrective actions and/or inconsistencies on documented functionality * Work with peers to improve methodologies and improve execution efficiency. * Adhere to quality standards and good test and verification practices. * Work as a lead, mentor junior engineers, and help them in debugging complex problems. * Able to Support Customer issues, by their reproduction and analysis. * Should be able multitask between different activities. Key Qualifications * Proven desire to learn and explore new state of the art technologies * Demonstrate good written and spoken English communication skills * Demonstrate good review and problem-solving skills * Knowledgeable with Verilog, VHDL and/or SystemVerilog * Knowledgeable with scripting languages (BASH/TCSH/PERL/PYTHON/TCL) is a plus * Understanding of verification methodology such as UVM . * Good organization and communication skills * Be a solution provider. * 8+ years of relevant experience

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7.0 - 12.0 years

7 - 12 Lacs

Noida, Uttar Pradesh, India

On-site

Applications Engineer position offers a wonderful opportunity to work on most challenging technical problems in verification domain and innovative technologies under Synopsys Verification Platform. Looking for an experienced and motivated professional who enjoys problem solving, open to continuous learning, passionate to work on cutting edge technologies and has excellent communication skills. It gives exposure to the breadth of HDL/HVL, methodologies, static and formal verification, dynamic simulation aspects including debug and experience in working in a diverse environment where interaction with domain experts across global locations will be involved. Key Requirements Experience: Bachelors degree in Electronics with 7+ Years or Master s degree in Electronics with 5+ Years Experience in verification technologies (Simulation, UVM, SVA, LRM understanding) Strong HDL language support (Verilog, VHDL, System Verilog) Simulation, UVM, Design Verification Digital design fundamental and RTL coding understanding Good Debugging skills. Scripting - Perl, TCL, Make, Shell Scripting. Role - VCS Simulation Technology Product Engineer Solid fundamentals in Digital design, HDLs (Verilog/VHDL) and System Verilog Exposure to Synopsys EDA tools (SpyGlass, VC SpyGlass, Verdi) would be added advantage Excellent written and oral communication skills is a must as the role requires interfacing global teams, proposing solutions Must have working knowledge on UNIX, TCL and/or any other scripting language to be effective Team player, partners with multiple stakeholders, has attention to detail and innovative mindset Motivated, doer and self-organized team worker with good social communication skills Open to travel, ability to multi-task, be detail-oriented Drive VCS/related technology customer deployment working closely with field and R&D Drive competitive engagements, requirements gathering for delivery strong product roadmap Work directly with R&D, Product Validation & Customers to suggest improvements in implementation and validation Use in-depth product understanding to provide technical expertise, diagnose, troubleshoot issues

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2.0 - 4.0 years

3 - 6 Lacs

Bengaluru

Work from Office

Responsibilities: * Design, develop & verify VHDL code using industry standards * Ensure timing closure through thorough verification processes * Collaborate with cross-functional teams on project deliverables

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8.0 - 9.0 years

8 - 9 Lacs

Noida, Uttar Pradesh, India

On-site

The environment must support identifying verification environment requirements from various sources like specifications, design functionality, and interfaces. It needs to generate verification test plans, verification environment documentation, and test environment usage documentation. The environment should allow you to define, develop, and verify complex UVM verification environments. It must enable evaluating and exercising various aspects of the development flow , including Verilog/SystemVerilog development, functional simulation, constraint development, test planning, behavioral modeling, and verification coverage metrics (functional coverage and code coverage). The environment should facilitate collaboration with architects, designers, and VIP teams. It needs to help identify design problems, possible corrective actions, and inconsistencies in documented functionality. The environment should support improving methodologies and execution efficiency. It must adhere to quality standards and good test and verification practices. The environment should assist leads in mentoring junior engineers and debugging complex problems. It needs to support reproduction and analysis of customer issues. The environment's infrastructure should allow for multitasking between different activities. It requires knowledge of Verilog, VHDL, and/or SystemVerilog. Proficiency with scripting languages (BASH/TCSH/PERL/PYTHON/TCL) is a plus. An understanding of UVM verification methodology is essential.

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8.0 - 9.0 years

4 - 8 Lacs

Pune, Maharashtra, India

On-site

Key Qualifications Proven desire to learn and explore new state of the art technologies Demonstrate good written and spoken English communication skills Demonstrate good review and problem-solving skills Knowledgeable with Verilog, VHDL and/or SystemVerilog Knowledgeable with scripting languages (BASH/TCSH/PERL/PYTHON/TCL) is a plus Understanding of verification methodology such as UVM . Good organization and communication skills Be a solution provider. 8+ years of relevant experience

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2.0 - 5.0 years

3 - 7 Lacs

Bengaluru

Work from Office

As a Functional verification engineer, you will be working on IBM server processors/SOC or ASICs used in IBM servers. Develop the verification environment and test bench and creating testcases. Debug fails using waveform, trace tools and debug RTL code Develop skills in IBM Functional verification tools and methodologies. Work with design as well as other key stakeholders in resolving/debugging logic design issues and deliver a quality design Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 5 + years of experience in Functional Verification of Processors or ASICs. Minimum 3+ years of experience in any of the following Computer architecture knowledge, Processor core design specifications, instruction set architecture and logic verification. Multi-processor cache coherency, Memory subsystem, IO subsystem knowledge, any of the protocols like PCIE/CXL, DDR, Flash, Ethernet etc Knowledge of functional verification methodology - UVM/OVM/System Verilog/SystemC/ Knowledge of HDLs (Verilog, VHDL) Good object-oriented programming skills in C/C++, and any of scripting languages like Python/Perl Development experience on Linux/Unix environments and in GIT repositories and basic understanding of Continues Integration and DevOps workflow Exposure in developing testbench environment, write complex test scenario, debugging and triaging fails Experience in verification coverage closure Preferred technical and professional experience Verify the different functions/components in a PCI Express Controller & high speed SERDES (PHY). Scripting Expertise backed up relevant experience in the same Writing Verification test plans Functional and code coverage analysis and debug Formal verification experience

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2.0 - 6.0 years

6 - 10 Lacs

Bengaluru

Work from Office

* Perform Sub system level floor planning, placement, and routing for high-performance microprocessor design. * Collaborate with cross-functional teams to achieve design goals. * Close the design to meet timing, power, and area requirements. * Implement engineering change orders (ECOs) to rectify functional bugs and timing issues. * Ensure the quality and efficiency of the RTL to GDS2 implementation process. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 8+ years of industry experience Good knowledge and hands on experience in physical design , timing and methodology which include logic synthesis, placement, clock tree synthesis, routing , post route closure. Should be knowledgeable in physical verification ( LVS,DRC. etc) ,Noise analysis, Power analysis and electro migration . Good knowledge and hands on experience in static timing analysis (closing timing at chip level) good understanding of timing constraints . Should have experience in handling asynchronous timing, multiple corner timing closure. Preferred technical and professional experience Automation skills in PYTHON, PERL , and/or TCL

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0 years

0 Lacs

Pune/Pimpri-Chinchwad Area

On-site

Position Engineer / Senior Engineer / Technical Lead (FPGA) Job Description What You'll Be Doing Use of hardware such as oscillator and logic analyzers for hardware debugging Good understanding of digital electronics and design practices Strong sense of ownership, passionate, fast learner, analytical mind set, perfection seeker. Excellent interpersonal, communication, collaboration and presentation skills. What Are We Looking For Strong VHDL/Verilog Programming skills In depth knowledge of RTL design, FPGA design, and FPGA design tools. Complete FPGA development flow from logic design, place & route, timing analysis closure, simulation, verification, and validation Experience with Xilinx/Intel/Lattice/Microchip FPGA families and corresponding development tools Experience in verification/simulation tools Modelsim/Questa-sim etc. Strong troubleshooting and debugging FPGA implementations on hardware boards Experience with debugging HW/SW issues and the use of equipment/tools such as oscilloscope, logic analyzer, Chipscope/ILA/Signal Tap Ability to understand synthesis reports, perform timing analysis and write FPGA design constraints Hands-on experience on communication protocols (UART/I2C/SPI etc.) and bus interfaces (AMBA/AXI etc.) Job Location: Bangalore, Pune, Ahmedabad Location: IN-GJ-Ahmedabad, India-Ognaj (eInfochips) Time Type Full time Job Category Engineering Services Show more Show less

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0.0 - 2.0 years

4 - 5 Lacs

Bengaluru

Work from Office

Fundamental Knowledge of VHDL: Understanding of VHDL programming basics and digital design principles. Familiarity with Design Tools: Basic exposure to tools such as AMD Vivado and SDK, with some knowledge of Petalinux, Verilog, and Intel Quartus. Introductory Experience in Interface Design: Understanding of high-speed interface concepts, cross-clock domain interactions, and the creation of simple test benches. Synthesis and Debugging Awareness: Basic understanding of synthesis processes and an introduction to debugging tools like ILA and Signal Tap for high-speed designs. Knowledge of Embedded Systems: Familiarity with embedded processor architectures and programmable logic. Hands-On Experience in Debugging: Basic skills in on-board debugging, troubleshooting mixed-signal designs, and understanding interface protocols like SPI and I2C. Interface Protocols Understanding: Introductory knowledge of Ethernet, PCIe, and LVDS interfaces. Programming Skills: Basic command of programming languages such as C and C++. Measurement Equipment Familiarity: Introductory experience with oscilloscopes and logic analyzers. Interest in Advanced Topics: Enthusiasm for learning about radar module design and high-speed memory interfaces

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1.0 - 3.0 years

0 Lacs

Bengaluru / Bangalore, Karnataka, India

On-site

Introduction As a Hardware Engineer at IBM, youll get to work on the systems that are driving the quantum revolution and the AI era. Join an elite team of engineering professionals who enable customers to make better decisions quicker on the most trusted hardware platform in todays market. Your role and responsibilities Understand the design specification , PowerOn Specification, and Power management specification. Understand boot firmware and reset flow. And/or Power management flow. Develop skills in IBM BIST verification tools and apply them successfully Develop the verification environment and test bench Debug fails using waveform, trace tools and debug RTL code Work with Design team in resolving/debugging logic design issues and responsible for deliveries Required education Bachelors Degree Preferred education Masters Degree Required technical and professional expertise 1-3 years of experience in Design Verification - demonstrated execution experience of verification of logic blocks Strong in SoC verification : Chip reset sequence and initialization, and/or Power management. Knowledge of verification (any) methodology, Knowledge of HDLs (Verilog, VHDL) Good programming skills in C/C++, Python/Perl Exposure in developing testbench environment, write complex test scenario, debugging and triaging fails Hardware debug skills backed by relevant experience on projects Exposure in developing testbench environment, write complex test scenarios Good communication skills and be able to work effectively in a global team environment Drive verification coverage closure Preferred technical and professional experience Knowledge of Chip-Initialisation , SCAN , BIST is a plus Scripting Expertise backed up relevant experience in the same Writing Verification test plans Functional and code coverage analysis and debug

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6.0 - 11.0 years

4 - 7 Lacs

Noida, Uttar Pradesh, India

On-site

The person should be an Electrical, Electronics or Computer Science Engineer with very good understanding of HDLs (Verilog and/ or VHDL). Prior experience in simulation/emulation using these languages. He/ she should have a good working knowledge of EDA tools (Cadence/ Others) with focus towards debugging design/ verification problems using these tools. Experience in process automation with scripting. Experience with SystemVerilog, C++, UVM. Experience with Functional Verification of complex digital systems, e.g. SoC Verification, with a Hardware Verification Language (HVL) like SystemVerilog. Experience designing and implementing complex functional verification environments is required. Knowledge of protocols like PCIe, USB3/4, DP an added advantage.

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3.0 years

0 Lacs

Dehradun, Uttarakhand, India

On-site

🔍 𝐇𝐞𝐫𝐞'𝐬 𝐰𝐡𝐚𝐭 𝐰𝐞'𝐫𝐞 𝐥𝐨𝐨𝐤𝐢𝐧𝐠 𝐟𝐨𝐫: #FPGADeveloper - Minimum 3 years of hands-on experience in FPGA/RTL development. - Proficient in Verilog/VHDL programming and Xilinx FPGA development tools such as Vivado. - Solid understanding and experience in physical layer signal processing. - Experience in DO-254-based development standards and documentation. - Exposure to SDR (Software Defined Radio) platforms is a plus. 𝐋𝐨𝐜𝐚𝐭𝐢𝐨𝐧: Dehradun (On-Site) 𝐄𝐱𝐩𝐞𝐫𝐢𝐞𝐧𝐜𝐞: 3-5 year 𝐖𝐨𝐫𝐤𝐰𝐞𝐞𝐤: 5 days 𝐄𝐥𝐢𝐠𝐢𝐛𝐢𝐥𝐢𝐭𝐲: 📜 Bachelor’s or Master’s degree in Electronics / Electrical / Communication Engineering or related fields Note: (Uttarakhand residents from Dehradun or the surrounding area are preferred) Apply now or share with someone who could be a great fit! 📩 Send your updated resume to: dharati.trivedi@logicsimplified.com Show more Show less

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