Sr. Design Engineer

Areas of Responsibility Circuit design and verification of the CMOS I2C IO and GPIO libraries. Develop I2C IO and GPIO (operation up to 200MHz) architecture to meet the specifications. Develop 3.3V architecture using 1.8V MOS to meet the design & reliability specifications. Optimisation of the design, verification of the functionality, performance, power using Cadence Virtuoso circuit design suite (ADE-XL) Working knowledge of the layout to guide the layout engineers on the implementation of the critical structures for matching, shielding and routing requirements. Strong problem-solving skills, results orientation, attention to detail, and effective communication skills are the key for this position. position Requirement: Experience: 5 10 years of experience in the areas of analog and IO circuit design, with good experience in designing Overvoltage, Failsafe & I2C compatible IO interfaces. Desired Skills : Strong hands on experience in CMOS IO design, programmable driver Impedance control, Impedance matching of transmission line. Solid hands on experience working with Cadence Virtuoso circuit design suite (ADE-XL) Good technical knowledge of power-performance trade-offs. Strong understanding of the impact of device parameter variation on design performance. Basic understanding of IO library views like .lib, IBIS generation Basic understanding of ESD & LU concepts. Independent ownership of circuit blocks. Clear communication and diligent documentation of the work. Good team player in a multi-site work environment Analog Circuit Design