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SerDes IP Senior Analog Design Engineer

SerDes IP Senior Analog Design Engineer

Synopsys

6 - 11 years

14 - 20 Lacs

bengaluru

Posted:1 day ago| Platform:

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Skills Required

cmos matlab adc python circuit c design verification dac cad drawing digital design analog circuit design verilog serdes ic design design product development mixed signal design analog design perl tcl scripting languages characterization

Work Mode

Work from Office

Job Type

Full Time

Job Description

Synopsys (India) Private Limited is looking for SerDes IP Senior Analog Design Engineer to join our team

Review SerDes standards to define and develop analog sub-block specifications for Multi-Gbps NRZ & PAM4 SERDES IP.
Identify, evaluate, and refine circuit architectures to optimize for power, area, and performance.
Propose and implement design and verification strategies using advanced simulation tools to ensure robust and high-quality designs.
Oversee physical layout efforts, focusing on minimizing parasitics, device stress, and process variation for high-speed circuits.
Present simulation results and design data for peer and customer reviews, facilitating collaborative problem-solving and design validation.
Document design features, test plans, and technical justifications to support internal and external stakeholders.

Disclaimer: This job description has been sourced from a public domain and may have been modified by Naukri.com to improve clarity for our users. We encourage job seekers to verify all details directly with the employer via their official channels before applying.

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SerDes IP Senior Analog Design Engineer