Analog IC Design Engineer

8 - 13 years

12 - 17 Lacs

Posted:1 hour ago| Platform: Naukri logo

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Job Type

Full Time

Job Description

What You Can Expect
Seeking a Senior Analog IC Designer to be part of a Marvells central engineering team designing highly sophisticated CMOS LR SERDES, D2D and common Analog IPs. Responsibilities would span architectural investigations and implementation for circuits such as PLL, DLL, ADC, regulators, amplifiers, TX, RX, CDRs etc. to meet key performance targets and performing design verification using industry standard tools such as SPICE, Spectre, MATLAB etc.
In this role, successful candidate will lead a team of analog design engineers, interface with layout, verification, and application teams and manage delivery of analog IP to successfully bring designs from concept to production.
What Were Looking For
Master s degree and/or PhD Preferred in Electrical Engineering or related fields with 8+ years of experience. A successful candidate should have experience in some of the following designs:
D2D IP, PLL, Data Converters, Oscillators and high-speed SerDes design including Receiver and Transmitter design.
Experience with 112G+ SerDes speed, especially short reach and low power designs
Experience in Single-ended High Density Parallel Interface for Chip to Chip Communication, UCIe, DDR5/LPDDR5; GDDR6/LPDDR6 a plus
Experience with analog design and verification tools (Virtuoso, Spectre, ADE and post layout extraction tools) is a must
Knowledge of the fundamentals on signal integrity improvement, noise reduction and Multi-GHz low-jitter clock generation & distribution.
Good understanding of analog layouts in FinFet and its effect on high-speed designs
Experienced in system level pre-tape out analog validation
Experienced in lab chip bring-up and debugging efforts
Strong communication skills

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Marvell Semiconductors

Semiconductors

Santa Clara

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