Senior Mixed Signal Verification Engineer

Kadel Labs

10 - 15 years

35 - 40 Lacs

bengaluru

Posted:4 hours ago| Platform:

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Skills Required

behavioural modelling mixed signal design uvm cadence virtuoso analog circuit design system system verilog synopsys

Work Mode

Work from Office

Job Type

Full Time

Job Description

Senior Mixed-Signal Verification Engineer

Preferred candidate profile

10+ years
of relevant industry experience in mixed-signal or Analog/digital verification.
Proven experience in
Behavioural Modelling (BM)
of Analog designs for digital verification.
Strong understanding of
mixed-signal dynamic verification
using
digital design tools
(no AMS simulators).
Hands-on experience with
Verilog/System-Verilog
coding and testbench development.
Proficiency with
Cadence Virtuoso
schematic and simulation tools.
Solid
foundation in Analog circuit design
principles.
Experience with
UVM
Familiarity with
both Synopsys and Cadence
verification environments.
Exposure to
high-speed Analog design
, such as SerDes, PLLs, or data converters (optional but valuable).

Additional Skills

Verification Methodologies & Tools:
Deep understanding of modern verification flows, including simulators, waveform viewers, automation frameworks, and coverage-driven verification. Proven ability to develop
scalable, reusable, and portable
test environments.
Collaboration & Teamwork:
Demonstrated ability to verify Analog and mixed-signal designs collaboratively within
multi-disciplinary teams
.
Communication:
Strong written and verbal communication skills. Able to write clear test plans, document verification results, and present findings effectively to cross-functional teams.

Time zone: Israel

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