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RTL/Physical Synthesis Engineer

12 - 16 years

0 Lacs

greater bengaluru area

Posted:1 day ago| Platform: Linkedin logo

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Skills Required

synthesis design optimization support flow development drive power automation fusion compiler verilog vhdl software engineering regression configuration management

Work Mode

On-site

Job Type

Full Time

Job Description

RTL Synthesis Engineer

Location: Bangalore

Exp: 12 - 16 Years


We are looking for a passionate engineer to join our front-end implementation team. In this role, you will:

  • Collaborate with multiple SoC design teams to develop and roll out robust RTL synthesis, UPF-based flows, QoR optimization, and netlist signoff methodologies.
  • Provide hands-on support and debug implementation flow issues across global design sites.
  • Lead flow development efforts independently, working closely with design teams and EDA vendors.

  • Team lead experience is essential.

  • Evaluate new tools and refine methodologies to drive PPA (Power, Performance, Area) improvements.
  • Maintain and enhance 3rd-party tool integrations and automation routines.

  • Required Skill Set

    • Strong proficiency in

      Python

      and

      Tcl

      scripting.
    • Hands-on experience with

      RTL Synthesis tools

      (e.g., Fusion Compiler, Genus).
    • Working knowledge of

      LEC

      and

      Low Power signoff tools

      .
    • Solid understanding of

      VLSI front-end design

      : Verilog/VHDL, synthesis, QoR optimization, and equivalence checking.
    • Familiarity with software engineering practices like version control, regression, and configuration management is a plus.
    • Self-driven, detail-oriented, and eager to take on new challenges.

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