Quantitative Developer (HFT — C++ / FPGA / OMS)

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Posted:2 days ago| Platform: Linkedin logo

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About PHNX Securities

PHNX Securities is building a next-generation quantitative trading firm. The firm operates with a disciplined, research-driven approach: robust backtesting, clean execution infrastructure, strict risk controls, and complete regulatory readiness.

Our philosophy is to develop a deep understanding of financial markets, translate that knowledge into robust models, and deploy systematic strategies across global markets with discipline and precision.

At our core, we THINK, STRATEGIZE, BUILD, and TRADE.

Our Mission

To combine research, automation, and disciplined risk management to create scalable, repeatable, high-conviction systematic strategies.

Role Overview

We are seeking an experienced HFT Quantitative Developer to design, build, and optimize ultra-low-latency trading infrastructure supporting research, deployment, and live operation of quantitative trading strategies.

The role sits at the intersection of quantitative research, market microstructure, and high-performance engineering, with a strong focus on production-grade C++ systems, FPGA-accelerated pipelines, and latency-sensitive execution across equities, futures and options markets.

Key Responsibilities

  • Design and develop

    ultra-low-latency trading systems

    in modern C++.

  • Build and optimize

    FPGA-based components

    for market data processing and order flow acceleration.

  • Integrate and enhance

    OMS and execution workflows

    , including order routing, risk checks, and fill handling.

  • Work closely with quantitative researchers to productionize strategies and improve throughput, stability, and determinism.

  • Profile, benchmark, and reduce system latency across network, kernel, and application layers.

  • Contribute to infrastructure for simulation, backtesting, and live strategy deployment.

  • Required Skills & Experience

    • Strong expertise in

      C++ (C++17/20), concurrency, memory management, and performance engineering

      .

    • Hands-on experience with

      FPGA development

      (Verilog, VHDL, HLS, or hardware-accelerated trading pipelines).

    • Solid understanding of

      OMS architecture

      , order life-cycle, FIX / native exchange protocols, and market microstructure.

    • Experience in

      low-latency trading, market data systems, or exchange-connected environments

      .

    • Familiarity with

      Linux networking, kernel tuning, and hardware-aware optimization

      .

    • Experience with

      futures and options trading systems

      .

    • Knowledge of

      tick-level simulation, backtesting infrastructure, or strategy deployment frameworks

      .

  • time-synchronization, PTP, NIC offload, or kernel-bypass networking

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