Principal Engr VLSI Chip Design backend DFT Physical design Japan MNC

8 - 12 years

60 - 70 Lacs

bangalore/bengaluru

Posted:2 hours ago| Platform: Naukri logo

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Hybrid

Job Type

Full Time

Job Description

Full time with century old top Japanese MNC

JOB SUMMARY ( Full time with Super Top Japanese MNC)

Job Title : Principal Engineer  Chip Design Back End

Job Overview:

Key Responsibilities: Technical Leadership

- Own synthesis, SDC constraint development, and formal verification.

- Drive place & route (P&R) including floorplanning, CTS, and timing closure.

- Optimize for power, performance, and area (PPA); manage power distribution and multi-voltage design.

- Lead STA across corners/modes and support technology node migration.

- Integrate and verify SCAN/MBIST, define test specifications, and debug test coverage issues.

- Perform DFM, DRC, and ESD checks to ensure manufacturability.

- Collaborate with cross-functional teams (Frontend, Analog.

- Document design flow, participate in design reviews, and mentor junior team members.

- Product Support and RMA support

Required Skills & Experience

MCU or low-power SoC designs

- Ability to lead the DFT teams, Physical and formal Verification Teams.

- Exposure to frontend and Analog processes.

-  Ability to collaborate effectively with frontend and analog teams

- Experience in Product Support for both Pre and Post Production Stages, Support for RMA teams.

Preferred Skills and Experience

- Min 1+ years of Project Management (Waterfall and Agile – Hybrid Methodology).

- Continuous Improvement.

- Knowledge of industry standards and best practices in semiconductor front-end design.

Qualifications:

Masters in VLSI design from reputed universities like IIT/NIT with a background in Bachelors in Electronics and
Communication, or a related field.

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