Principal Engineer, ASIC Development Engineering

Role Overview: You will be responsible for designing ASIC/IP Digital Design for large SOCs, utilizing your expertise in Verilog/SV implementation for complex designs with multiple clock domains. Your role will also involve working on various bus matrices like AHB, AXI, and NOC designs, and experience with ARM processor and/or NAND Flash subsystems would be advantageous. Additionally, you will contribute to low power design methodology, clock domain crossing designs, Spyglass Lint/CDC checks, report analysis, and signoff. Proficiency in Perl, Python, TCL language, and the ability to collaborate effectively with Verification/Validation teams are essential. Your positive attitude, problem-solving skills, and excellent written and verbal communication abilities will be key to your success in this role. Key Responsibilities: - Design ASIC/IP Digital Design for large SOCs - Implement RTL in Verilog/SV for complex designs with multiple clock domains - Work on various bus matrices like AHB, AXI, and NOC designs - Contribute to ARM processor and/or NAND Flash subsystems - Assist in low power design methodology and clock domain crossing designs - Perform Spyglass Lint/CDC checks, report analysis, and signoff - Engage in Synthesis using DC, timing analysis, and closure - Utilize expertise in Perl, Python, TCL language - Collaborate effectively with Verification/Validation teams Qualifications Required: - Bachelors with 7+ yrs experience, Masters with 6+ yrs experience, or PhD with 3+ yrs experience in CS, CE, EE, EC, or equivalent - Expertise in Verilog/SV implementation for complex designs with multiple clock domains - Familiarity with bus matrices like AHB, AXI, and NOC designs - Knowledge of ARM processor and/or NAND Flash subsystems is a plus - Experience in low power design methodology and clock domain crossing designs - Proficiency in Spyglass Lint/CDC checks, report analysis, and signoff - Familiarity with Synthesis using DC, timing analysis, and closure - Skills in Perl, Python, TCL language - Ability to collaborate effectively with Verification/Validation teams Additional Company Information: Western Digital values diversity and believes that embracing various perspectives leads to the best outcomes for employees, customers, and communities. The company is committed to creating an inclusive environment where every individual can thrive through a sense of belonging, respect, and contribution. Western Digital also ensures that opportunities are accessible to applicants with disabilities. If you require accommodation during the hiring process, please contact staffingsupport@wdc.com with details of your request.,