Physical Design Tech Lead

Physical Design Tech Lead

Key Responsibilities

Leadership Responsibilities

• Lead and mentor the Physical Design engineering team while also contributing as an individual contributor.
• Drive execution, quality, and schedule for block-level and full-chip physical design activities.
• Review design challenges with stakeholders and provide technical direction for closure.
• Coordinate with cross-functional teams and provide status updates to management.

Technical Responsibilities

• Own and execute end-to-end physical design tasks:
• Floorplanning
• Power planning
• Placement
• Clock Tree Synthesis (CTS)
• Routing
• Physical Verification (LVS/DRC)
• Achieve timing closure across multiple PVT corners using STA methodologies.
• Perform IR drop, EM analysis, and drive fixes for power integrity.
• Debug PnR, timing, and physical verification issues and provide root-cause solutions.
• Work closely with RTL, DFT, Packaging, and Manufacturing teams to ensure seamless integration.
• Contribute to PD flow and automation enhancements to improve QoR, schedule, and efficiency.

Required Qualifications

• B.Sc. / M.Sc. in Electrical Engineering or related field.

• 13 to 20+ years

  of hands-on experience in ASIC Physical Design with strong tape-out history.
• Expertise with industry-standard EDA tools:
• Innovus / ICC2
• PrimeTime
• Voltus / RedHawk
• Calibre (DRC/LVS)
• Strong understanding of:
• Timing closure
• Signal integrity
• IR drop / EM analysis
• Physical verification flows
• Proficiency in scripting languages such as

  TCL, Python, or Perl

  for automation.
• Excellent communication, leadership, and problem-solving skills.

Preferred Qualifications

• Experience with

  hierarchical design methodologies

  .
• Exposure to

  low-power design

  techniques (UPF-based).
• Familiarity with

  advanced process nodes

  (7nm, 5nm, or below).
• Experience leading multi-site or cross-functional teams.