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Physical Design Engineer

0 years

0 Lacs

Posted:12 hours ago| Platform: Linkedin logo

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Work Mode

On-site

Job Type

Full Time

Job Description

o Tapeout experience in block level PnR implementation including synthesis for medium to complex blocks o Good to have experience in TSMC/Intel lower technology node(16/14nm or below) o Experience in independently analyzing/resolving congestion, timing issues and basic understanding of clock tree build o Basic Timing understanding to independently analyze timing paths o Experience in ICC2/Innovus/DC tools, Fusion compiler being added advantage o Basic equivalency check understanding. Good to have Conformal LEC experience. o Should have understanding of basic shell scripting, tool based TCL scripting to automate redundant tasks Show more Show less

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HCLTech
HCLTech

Information Technology Services

New Delhi

210,000+ Employees

1077 Jobs

    Key People

  • C Vijayakumar

    CEO
  • Kalyan Kumar

    Corporate Vice President & Chief Technology Officer

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