Posted:3 months ago|
Platform:
Work from Office
Full Time
Key Responsibilities: Perform block-level STA and ensure timing closure at various design stages. Work with Synopsys Primetime, Cadence Tempus, or equivalent timing closure tools for analysis and optimization. Analyze and refine timing constraints at both pre-layout and post-layout stages. Collaborate with PD HM owners to provide timing feedback during placement, CTS, and routing phases. Generate timing ECOs for final timing closure using DMSA/Tweaker . Conduct MPW/MP/TDRC analysis and work with Infinisim tools as required. Analyze timing reports, debug violations, and propose fixes for efficient sign-off. Work closely with PD and STA engineers to meet design sign-off criteria. Preferred Skills: Expertise in Primetime/Tempus scripting and timing report analysis . Strong understanding of clock tree synthesis (CTS), routing strategies, and timing convergence . Experience in multi-corner, multi-mode (MCMM) timing analysis . Familiarity with low-power design techniques and constraint optimizations . Strong problem-solving and debugging skills in STA and PD workflows . Interested candidates can share their resumes to shubhanshi@incise.in
Incise Infotech
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Bengaluru, Noida
20.0 - 35.0 Lacs P.A.