PD Lead

SignOff semiconductors

6 - 10 years

25 - 40 Lacs

hyderabad bengaluru

Posted:14 hours ago| Platform:

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Skills Required

sta floor planning pnr primetime cts optimization caliber

Work Mode

Work from Office

Job Type

Full Time

Job Description

Role & responsibilities

Leading a team of 3-5 engineers for block-level implementation.
Collaborating with a cross-functional team for project planning and completion.
Contribute to enhancement of methodologies and flow.
Overseeing timing closure, power optimization, and physical verification using industry-standard EDA tools.
Managing resources and schedules to ensure timely and quality deliverables.
Technical leadership to analyze and debug complex issues and recommend.
Supporting and developing best practices in design methodology, quality assurance, and continuous process improvement

Preferred candidate profile

Experience of Netlist-to-GDS design flow, including floor-planning, placement, optimization, CTS, and routing.
Good knowledge and experience of industry-standard EDA tools and methodology.
Experience and knowledge of sign-off checks like Static Timing Analysis, Physical Verification, and tools like PrimeTime and Caliber/ICV.
Experience of leading/managing a team for physical implementation and tape-out.
Experience with AMD flow and methodology.
Scripting and automation experience is a plus.
Interacted with stakeholders across multiple geographies and cultures.

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