Lead-Design Verification

Key Responsibilities

• Develop and implement verification test plans for digital designs, including block-level and chip-level verification.​
• Collaborate with design and architecture teams to understand specifications and requirements.​
• Create and enhance constrained-random and directed verification environments using SystemVerilog and UVM.​
• Execute verification tasks, document results, and ensure compliance with design specifications.​
• Troubleshoot and resolve issues identified during verification, including debugging failures and analyzing waveforms.​
• Perform coverage analysis (functional, code, assertion) and close coverage gaps by creating additional test scenarios.​
• Utilize simulation tools (ModelSim, VCS, etc.), emulation platforms, and scripting languages (Python, Perl, TCL) for automation and efficiency.​
• Participate in design reviews and contribute to continuous improvement of verification processes.​
• Maintain up-to-date knowledge of industry best practices and emerging technologies.​

Job Types: Full-time, Permanent

Pay: ₹1,000,000.00 - ₹3,500,000.00 per year

Benefits:

• Cell phone reimbursement
• Commuter assistance
• Flexible schedule
• Health insurance
• Leave encashment
• Life insurance
• Paid sick time
• Paid time off
• Provident Fund

Work Location: In person