Implementation/ Power - Lead engineer

Role Overview: As a Hardware Engineer at Qualcomm India Private Limited, you will play a crucial role in planning, designing, optimizing, verifying, and testing electronic systems. Your responsibilities will include working on circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems to launch cutting-edge products. Collaboration with cross-functional teams will be essential to develop solutions and meet performance requirements. Key Responsibilities: - Possess 6 to 9 years of experience in Synthesis, Constraints, and interface timing Challenges with a strong knowledge of Power being preferable. - Demonstrate expertise in RTL Design, implementation, and Timing analysis. - Utilize experience in RTL coding using Verilog/VHDL/System Verilog. - Engage in micro-architecture & designing cores and ASICs. - Familiarity with Synthesis, Formal Verification, Linting, CDC, Low Power, UPFs, etc. - Exposure to scripting languages such as Pearl/Python/TCL. - Showcase strong debugging capabilities in Synthesis, timing analysis & implementation. - Collaborate closely with cross-functional teams to research, design, and implement performance, constraints, and power management strategy for the product roadmap. - Exhibit good team player qualities and proactively interact with other teams/verification engineers. - Demonstrate the ability to independently debug and solve issues. Qualifications Required: - Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field with 3+ years of Hardware Engineering or related work experience; OR Master's degree in the same field with 2+ years of experience; OR PhD with 1+ year of experience. - Strong Domain Knowledge in RTL Design, implementation, and Timing analysis. - Experience with RTL coding using Verilog/VHDL/System Verilog. - Familiarity with Synthesis, Formal Verification, Linting, CDC, Low Power, UPFs, etc. - Exposure to scripting languages like Pearl/Python/TCL. - Excellent debugging capabilities in Synthesis, timing analysis & implementation. - Ability to collaborate effectively with cross-functional teams and independently solve issues. (Note: Omitted additional details of the company as it is not directly related to the job role),