13 Low Power Jobs

Qualcomm India Private Limited is seeking a Hardware Engineer to join their Engineering Group, specifically focusing on Hardware Engineering. As a Hardware Engineer at Qualcomm, you will be at the forefront of technology innovation, contributing to the development of cutting-edge products that drive digital transformation and create a smarter, connected future. Your responsibilities will include planning, designing, optimizing, verifying, and testing electronic systems, circuits, mechanical systems, and various other hardware components to ensure the successful launch of world-class products. To qualify for this role, you must have a Bachelor's degree, Master's degree, or PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or a related field, along with several years of experience in Hardware Engineering. You should possess a strong background in RTL Design and Hardware Engineering, with expertise in RTL design tools such as Verilog, VHDL, and System Verilog. Additionally, familiarity with synthesis, formal verification, scripting languages (Pearl/Python/TCL), and debugging capabilities at simulation and Silicon environments is required. As a Hardware Engineer at Qualcomm, you will work collaboratively with cross-functional teams to research, design, and implement performance and power management strategies for product development. Your responsibilities will also involve designing low power/power management controller IP blocks, collaborating with technology/circuit design and verification/physical design teams, and integrating low power solutions into wireless SoC chips. Qualcomm is an equal opportunity employer and is committed to providing accommodations for individuals with disabilities throughout the application and hiring process. If you require accommodations, you can reach out to Qualcomm via email at disability-accommodations@qualcomm.com or by phone. Additionally, Qualcomm expects its employees to adhere to all applicable policies and procedures, including the protection of confidential information. Please note that Qualcomm does not accept unsolicited resumes or applications from staffing and recruiting agencies. If you have any inquiries about this Hardware Engineer role, you can contact Qualcomm Careers for more information.,

Qualcomm India Private Limited is seeking a Hardware Engineer to join the Engineering Group, specifically in the Hardware Engineering department. As a Hardware Engineer, you will be responsible for understanding the Video Codec specifications for respective blocks, micro-architecting sub-block designs, coding, debugging functionalities for all respective blocks, and performing design optimizations for Power/Area/Timing/Performance. The ideal candidate should possess a strong DSP/Multimedia Domain Knowledge on Video Codecs/Computer Vision, along with experience in micro-architecting and designing complex datapath cores for ASICs/SoCs, including AI/ML cores for CV applications. Proficiency in RTL coding using Verilog/VHDL/system Verilog, familiarity with Synthesis and Formal Verification, simulation debugging with Verdi & log file, exposure in scripting, and knowledge of Linting, CDC, Low Power, etc., are highly desirable. In addition to technical skills, the successful candidate should be a good team player, capable of proactive interaction with verification engineers. Strong problem-solving skills, the ability to debug and resolve issues independently, and a commitment to continuous learning are essential for this role. Minimum Qualifications: - Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field with 2+ years of Hardware Engineering or related work experience, OR - Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field with 1+ year of Hardware Engineering or related work experience, OR - PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Qualcomm is an equal opportunity employer and is committed to providing accessible processes for individuals with disabilities. For accommodation during the application/hiring process, individuals can contact Qualcomm via email at disability-accommodations@qualcomm.com or through Qualcomm's toll-free number. It is important for all employees at Qualcomm to adhere to applicable policies and procedures, including those related to security and the protection of confidential information. The company expects its employees to comply with these requirements within the permissible limits of applicable law. Please note that Qualcomm's Careers Site is exclusively for individuals seeking jobs at Qualcomm. Staffing and recruiting agencies, as well as individuals being represented by an agency, are not authorized to use this site for submissions. Unsolicited resumes or applications from agencies will not be accepted. For more information about this role, please contact Qualcomm Careers directly.,

Qualcomm India Private Limited is a leading technology innovator that pushes the boundaries of what's possible to enable next-generation experiences and drive digital transformation for a smarter, connected future. As a Qualcomm Hardware Engineer, your responsibilities will include planning, designing, optimizing, verifying, and testing electronic systems. You will work on a wide range of systems such as circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems to launch cutting-edge, world-class products. Collaboration with cross-functional teams is essential to develop solutions that meet performance requirements. You should possess a Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or a related field along with 3+ years of Hardware Engineering experience. Alternatively, a Master's degree with 2+ years of related work experience or a PhD with 1+ year of related work experience is also acceptable. A minimum of 5 years of RTL Design/Hardware Engineering experience is required. Strong domain knowledge in RTL design (Verilog/VHDL/System Verilog), implementation, integration, micro-architecture, and designing cores and ASICs is essential. Additionally, familiarity with Synthesis, Formal Verification, Linting, CDC, Low Power, UPFs, scripting (Pearl/Python/TCL), and strong debugging capabilities at simulation, emulation, and Silicon environments are required. You will collaborate closely with cross-functional teams to research, design, and implement performance and power management strategies for the product roadmap. Knowledge in designing low power/power management controller IP blocks including AVS (adaptive voltage scaling), ACD (adaptive clock distribution), on-chip sensor controller is necessary. Your role will involve working closely with the technology/circuit design team to close IP block specifications, collaborating with the verification/physical design team for IP design implementation, and supporting the SoC team to integrate low power/power management IP solutions into wireless SoC chips and front-end design flows. Furthermore, you will work closely with the system/software/test team to enable low power features in SoC products. Qualcomm is an equal opportunity employer committed to providing accessible processes for individuals with disabilities during the application/hiring process. If you require accommodation, you may contact disability-accommodations@qualcomm.com. Qualcomm expects its employees to adhere to all applicable policies and procedures, including security requirements for protecting confidential information. Please note that our Careers Site is intended for individuals seeking job opportunities at Qualcomm. Staffing and recruiting agencies are not authorized to use this site for submissions. For more information about this role, please reach out to Qualcomm Careers directly.,

Experience in Logic design /micro-architecture / RTL coding is a must. Must have hands on experience with SoC design and integration for complex SoCs. Experience inVerilog/System-Verilogis a must. Should have knowledge of AMBA protocols - AXI, AHB, APB, SoC clocking/reset/debug architecture and peripherals like USB, PCIE and SDCC. Understanding of Memory controller designs and microprocessors is an added advantage Hands on experience in constraint development and timing closure Work closely with the SoC verification and validation teams for pre/post Silicon debug Hands on experience in Low power SoC design is required Experience in Synthesis / Understanding of timing concepts for ASIC is required. Hands on experience in Multi Clock designs, Asynchronous interface is a must. Experience creating pad ring and working with the chip level floorplan team is an added advantage Experience in using the tools in ASIC development such as Lint, CDC, Design compiler and Primetime isrequired. Minimum Qualifications: Bachelors degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Masters degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. Preferred Qualifications 2-9 years of experience in SoC design Educational Requirements: 2+ years of experience with abachelors/masters degree in Electrical engineering

Qualcomm India Private Limited is a leading technology innovator that pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to create a smarter, connected future for all. As a Hardware Engineer at Qualcomm, you will be responsible for planning, designing, optimizing, verifying, and testing electronic systems, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems to launch cutting-edge, world-class products. You will collaborate with cross-functional teams to develop solutions and meet performance requirements. You should have a Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or a related field with 4+ years of Hardware Engineering experience, or a Master's degree with 3+ years of experience, or a PhD with 2+ years of experience. We are seeking bright ASIC design engineers with excellent analytical and technical skills to be part of a fast-paced team responsible for delivering Snapdragon CPU design for high-performance SoCs in sub-10nm process for Mobile, Compute, and IOT market space. In this role, you will participate in projects involved in the development of ASICs, focusing on Place and Route Implementation, Timing Closure, Low Power, Power Analysis, and Physical Verification. You will create design experiments, perform detailed PPA comparison analysis, work closely with RTL design, Synthesis, low power, Thermal, Power analysis, and Power estimation teams to optimize Performance, Power, and Area (PPA). Key Responsibilities: - Develop Place & Route recipes for optimal PPA - Tabulate metrics results for analysis comparison - Complete ASIC flow with low power, performance, and area optimization techniques - Experience with STA using Primetime and/or Tempus - Proficient in constraint generation and validation - Knowledge of multiple power domain implementation with complex UPF/CPF definition - Formal verification experience (Formality/Conformal) - Skills in Perl/Tcl, Python, C++ - Strong problem-solving and ASIC development/debugging skills - Experience with CPU micro-architecture and their critical path - Low power implementation techniques experience - High-speed CPU implementation - Clock Tree Implementation Techniques for High Speed Design Implementation - Exposure to Constraint management tool and Verilog coding experience Qualcomm is an equal opportunity employer committed to providing accessible processes for individuals with disabilities. If you require accommodations during the application/hiring process, please email disability-accommodations@qualcomm.com or call Qualcomm's toll-free number. Qualcomm expects its employees to comply with all applicable policies and procedures, including security and confidentiality requirements. For more information about this role, please contact Qualcomm Careers.,

Qualcomm India Private Limited is seeking a passionate and skilled Hardware Engineer to join our Engineering Group. As a Hardware Engineer at Qualcomm, you will be involved in planning, designing, optimizing, verifying, and testing electronic systems. Your responsibilities will include working on a wide range of systems such as circuits, mechanical systems, Digital/Analog/RF/optical systems, FPGA, and/or DSP systems to develop cutting-edge products. Collaboration with cross-functional teams is essential to meet performance requirements and deliver innovative solutions. To be considered for this role, you should hold a Bachelor's degree, Master's degree, or PhD in Computer Science, Electrical/Electronics Engineering, or a related field, along with 1-3+ years of Hardware Engineering experience. We are particularly interested in individuals with ASIC design expertise and strong analytical skills. This is a fantastic opportunity to contribute to the development of Snapdragon CPU design and high-performance SoCs in the Mobile, Compute, and IOT market space. Key responsibilities include participating in ASIC development projects, focusing on Place and Route Implementation, Timing Closure, Low Power, Power Analysis, and Physical Verification. You will be required to conduct detailed analysis to improve results, optimize Performance, Power, and Area (PPA), and collaborate closely with various teams to achieve project goals. Proficiency in tools such as FC, Innovus, Primetime, Tempus, and languages like Perl, Tcl, Python, and C++ is highly desirable. Your role will involve developing Place & Route recipes for optimal PPA, managing constraints, and ensuring the implementation of low power techniques. Experience with CPU micro-architecture, clock tree implementation, Verilog coding, and formal verification will be valuable assets. Strong problem-solving skills and a dedication to ASIC development and debugging are essential in this role. Qualcomm is an equal opportunity employer committed to providing a supportive and accessible work environment for individuals with disabilities. If you require accommodations during the application process, please contact us at disability-accommodations@qualcomm.com. We expect all employees to adhere to company policies and procedures, including maintaining the confidentiality of proprietary information. Staffing and recruiting agencies are advised not to submit unsolicited profiles, applications, or resumes through our Careers Site. For further inquiries about this position, please reach out to Qualcomm Careers.,

Qualcomm India Private Limited is a leading technology innovator that strives to enable next-generation experiences and drive digital transformation for a smarter, connected future. As a Qualcomm Hardware Engineer, your responsibilities will include planning, designing, optimizing, verifying, and testing electronic systems. This involves working on circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment, packaging, test systems, FPGA, and/or DSP systems to develop cutting-edge products. Collaboration with cross-functional teams is essential to meet performance requirements and develop innovative solutions. To qualify for this position, you should hold a Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or a related field along with 4+ years of Hardware Engineering experience. Alternatively, a Master's degree with 3+ years or a PhD with 2+ years of relevant work experience would be considered. We are seeking bright ASIC design engineers with strong analytical and technical skills to be part of a dynamic team responsible for delivering Snapdragon CPU design for Mobile, Compute, and IOT markets. Key responsibilities include participating in ASIC development projects, focusing on Place and Route Implementation, Timing Closure, Low Power, Power Analysis, and Physical Verification. You will be involved in creating design experiments, conducting PPA comparison analysis, and collaborating closely with RTL design, Synthesis, low power, Thermal, Power analysis, and Power estimation teams to optimize Performance, Power, and Area (PPA). Additionally, developing Place & Route recipes for optimal PPA, tabulating metrics results for analysis, and contributing to the ASIC flow with low power, performance, and area optimization techniques are crucial aspects of this role. The ideal candidate should have 10-15 years of High-Performance core Place & Route and ASIC design Implementation work experience. Proficiency in Place & Route with FC or Innovus, experience with STA using Primetime and/or Tempus, and strong problem-solving skills are preferred qualifications. Knowledge in constraint generation and validation, power domain implementation, formal verification, scripting languages like Perl/Tcl, Python, C++, as well as exposure to Verilog coding and CPU micro-architecture will be advantageous. Qualcomm is an equal opportunity employer committed to providing accessible processes for individuals with disabilities. If you require accommodations during the application/hiring process, please contact disability-accommodations@qualcomm.com. The company's work environment is inclusive and supportive of individuals with disabilities. Applicants should adhere to all relevant policies and procedures, including security measures and confidentiality of company information. Qualcomm does not accept unsolicited resumes or applications from staffing agencies. For more information about this role, please reach out to Qualcomm Careers.,

As a Lead Analog Validation Engineer, you should have a minimum of 7 years of experience and hold a Bachelors or Masters degree in Electronics or Electronics & Communication. Your expertise should include a strong understanding of electrical circuit analysis, design, and test fundamentals. You must be proficient in automating Analog Characterization Setups using Labview and Test Stand, and have strong debugging and problem-solving skills. Your responsibilities will include bringing up Silicon & Analog Validation Platforms for new ASIC/SoC designs, developing bench characterization test methodologies for various Analog IPs such as ADC, DAC, PLL, USB, VREG, OSC, DDR, LOW POWER, and IO PADs. You will also be required to develop automated code to control test equipment and generate required PVT electrical parameters. Additionally, you should possess expertise in using test & measurement equipment for Analog Validation, PVT characterization of Analog IPs, and have experience in Multilayer Board design, testing, integration, and Signal Integrity issues. Knowledge of C programming is essential for this role. Strong leadership and planning skills are crucial as you will be expected to deliver timely results in lead positions. You will work closely with cross-functional teams including marketing, systems, design, test, and project management to support the successful launch of new products. Your ability to communicate effectively with individuals from diverse backgrounds and strong team-building skills are essential for this role. Your motivation and energy to tackle bench characterization challenges on stand-alone/automated setups will be key to success in this position.,

The ideal candidate for this position should have at least 7+ years of experience in the field. The location for this role includes Bangalore, Delhi NCR, and Hyderabad with 8-10 openings available. The preferred education qualifications are BE/B.Tech./MS/M.Tech. in Electronics or Electronics & Communication. **Required Basic Qualification & Skills:** - Strong understanding of electrical circuit analysis, design, and test fundamentals - Automation of Analog Characterization Setups using Labview and Test Stand - Strong debugging and problem-solving skills - Experience in bring up of Silicon & Analog Validation Platforms - Proficiency in C programming - Leadership and planning skills for timely results delivery **Additional Preferred Qualifications:** - Expertise in using test & measurement equipment for Analog Validation - PVT characterization experience of Analog IPs like ADC, DAC, PLL, USB, VREG, OSC, DDR, LOW POWER, and IO PADs - Good debugging exposure and root cause analysis for new analog designs - Knowledge of Multilayer Board design, testing, integration, and Signal Integrity issues - Experience with LabVIEW and Test Stand automation software - Working experience in a lab environment **Primary and Secondary Responsibilities:** - Develop unique bench characterization test methodologies for Analog IPs - Write automated code for controlling test equipment during data collection and processing - Perform Design Evaluation and Bench Characterization for Analog IPs - Provide requirements and review schematics for circuit board development **Other Complex Tasks:** - Provide customer application note support by generating characterization data - Collaborate with cross-functional teams for successful product launches **Team and People Skills:** - Strong team-building skills and effective communication abilities are essential for this role.,

Qualcomm India Private Limited is a leading technology innovator that aims to enable next-generation experiences and drive digital transformation for a smarter, connected future. As a Qualcomm Hardware Engineer, you will be involved in planning, designing, optimizing, verifying, and testing electronic systems. This includes working on circuits, mechanical systems, Digital/Analog/RF/optical systems, test systems, FPGA, and/or DSP systems to launch cutting-edge products. Collaboration with cross-functional teams is essential to develop solutions that meet performance requirements. To be considered for this role, you should have a Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or a related field along with 4+ years of Hardware Engineering experience. Alternatively, a Master's degree with 3+ years of experience or a PhD with 2+ years of experience is also acceptable. The ideal candidate should possess strong analytical and technical skills, especially in ASIC design. Responsibilities for this position include participating in ASIC development projects, focusing on Place and Route Implementation, Timing Closure, Low Power, Power Analysis, and Physical Verification. You will be expected to create design experiments, conduct detailed PPA comparison analysis, collaborate with various teams for optimization, and develop Place & Route recipes for optimal PPA results. Qualifications required for this role include 6-15 years of experience in High-Performance core Place & Route and ASIC design Implementation. Preferred qualifications involve extensive experience in Place & Route with FC or Innovus, knowledge of complete ASIC flow with optimization techniques, proficiency in STA using Primetime and/or Tempus, and skills in Perl/Tcl, Python, C++, among others. Problem-solving abilities, experience with CPU micro-architecture, low power implementation techniques, and clock tree implementation techniques are also desired. Qualcomm is an equal opportunity employer committed to providing accessible processes for individuals with disabilities. If accommodation is needed during the application/hiring process, individuals can contact Qualcomm for support. The company expects its employees to adhere to all applicable policies and procedures, including confidentiality requirements. Staffing and recruiting agencies are advised that only individuals seeking a job at Qualcomm should use the Careers Site. Unsolicited submissions from agencies will not be accepted. For more information about this role, interested individuals can contact Qualcomm Careers directly.,

Write high-level architecture specifications. Design and implement low power techniques including RTL and UPF design Lead PPA analysis and power modeling to determine design tradeoffs Perform synthesis and timing what-if analysis Develop and automate low power design flows in collaboration with cross-functional teams Minimum Qualifications Experience: M.Sc. Degree in Electrical Engineering, Computer Science, or Computer Engineering, with 10+ years of experience Experience in low power design and methodology in advanced technology nodes Excellent technical and analytical background with problem-solving skills Great team worker with multi-discipline, multi-cultural and multi-site environments Strong scripting and flow automation skills (Shell, TCL and Python) Strong RTL development experience in HDL programming languages (Verilog / SystemVerilog) Experience in Digital Design Flow including synthesis and static timing analysis In-depth understanding of low power design techniques such as power gating, clock gating, state retention, near-threshold computing, etc Excellent written and verbal communication Preferred Qualifications Experience: PhD in Electrical and Computer Engineering Experience in Cadence Suite (Virtuoso ADE Spectre) Experience in System-C and Platform Architect Experience in PDN or IR analysis Experience in SPICE simulation

Understanding of GPU power and clock domains with power-up/down sequences Own end to end DV tasks from coding Test bench and test cases, write assertions, debugging simulations and achieving all coverage goals Develop test plan to verify sequences and design components for Clock and power management modules. Explore innovative DV methodologies (formal and simulation ) to continuously push the quality and efficiency of test benches Successful candidatewill be required to collaborate with worldwide design, silicon and architecture teams to achieve all project goals. Hence, we are looking for candidates with strong communication skills. Minimum Qualifications: Bachelors degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Masters degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Minimum Qualifications Minimum 3 -13 years of design verification experience * Senior positions to be offered to candidates with proven expertise in the relevant field Preferred Qualifications * 3+ years industry experience with below skillset : Strong System Verilog/UVM based verification skills & experience with assertion & coverage-based verification methodology Experience in formal / static verification methodologies will be a plus Basic understanding of low power design techniques Good understanding of design components such as clock gates, level shifters, isolation cells and state retention cells. Experience with Synopsys NLP (native Low Power) tool. Experience with scripting languages such as Perl, Python is a plus Education Requirements BE/BTech/ME/MTech/MS Electrical Engineering and/or Electronics, VLSI from reputed university preferably with distinction

Experience in Logic design /micro-architecture / RTL coding is a must. Must have hands on experience with SoC design and integration for complex SoCs. Experience inVerilog/System-Verilogis a must. Should have knowledge of AMBA protocols - AXI, AHB, APB, SoC clocking/reset/debug architecture and peripherals like USB, PCIE and SDCC. Understanding of Memory controller designs and microprocessors is an added advantage Hands on experience in constraint development and timing closure Work closely with the SoC verification and validation teams for pre/post Silicon debug Hands on experience in Low power SoC design is required Experience in Synthesis / Understanding of timing concepts for ASIC is required. Hands on experience in Multi Clock designs, Asynchronous interface is a must. Experience creating pad ring and working with the chip level floorplan team is an added advantage Experience in using the tools in ASIC development such as Lint, CDC, Design compiler and Primetime isrequired. Minimum Qualifications: Bachelors degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Masters degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. Preferred Qualifications 2-9 years of experience in SoC design Educational Requirements: 2+ years of experience with abachelors/masters degree in Electrical engineering