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Functional Verification Engineer

Functional Verification Engineer

ti Steps

2 - 5 years

2 - 5 Lacs

hyderabad chennai bengaluru

Posted:1 week ago| Platform:

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Skills Required

soc ip uvm system verilog test cases assertions

Work Mode

Work from Office

Job Type

Full Time

Job Description

Functional Verification Engineer

Job Title:

Responsibilities:

Develop directed/random testcases for verifying functional specs
Use UVM-based testbenches for simulation
Identify corner cases and achieve high coverage metrics
Participate in verification planning and reviews

Requirements:

Deep understanding of SoC/IP-level functional verification
Proficient in UVM, System Verilog, and scripting
Familiarity with assertion-based verification (SVA)

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ti Steps

Staffing and Recruiting

Frankfurt Germany

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Functional Verification Engineer