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Capgemini
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Excellent opportunity For Senior Design Verification Engineers & Leads

Excellent opportunity For Senior Design Verification Engineers & Leads

5 - 10 years

|

0 - 3 Lacs

hyderabad chennai bengaluru

Posted:1 week ago| Platform:

Apply

Skills Required

soc verification arm uvm system verilog

Work Mode

Hybrid

Job Type

Full Time

Job Description

Location: Bangalore, Hyderabad & Chennai

5-14years of experience in verification & Soc & System verilog,UVM
You will be part of the team verifying IPs and SoCs leading to first Si success.
Manage and lead a team of Verification engineers
IP verification is coverage driven using latest industry standard methodologies and HVLs.
Work involves defining verification strategy, writing test plans, developing efficient test benches and test cases.
Code coverage, Functional coverage and assertions are desired.
ARM based SoC verification experience is an added advantage.
Proficiency in one scripting language like Perl, C++, Python, Unix Make, Unix Shell Scripts etc. is a great plus.
Multiple positions with emphasis on AMS and Power aware verification.

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