Emulation Engineer

Experience

Qualification

As an Emulation Engineer, youll be an integral part of a dynamic team dedicated to creating cutting-edge ASIC solutions for High-Performance Computing (HPC) systems. Your role will involve defining the validation strategy leading to functional sign-off for these high-performance computing designs.

Key functions and responsibilities:

Proficient in various emulation technologies, including simulation acceleration, in-circuit emulation, speed bridges, virtual prototyping, and hybrid methods.

Familiarity with tools such as Palladium, Protium, Veloce, or Zebu.

Good Knowledge of SystemC/C/C++ and UVM/SV verification languages

Experience with SystemVerilog and C++ for modelling RTL components and transactors.

Ability to develop C/C++/SystemC/SV tests in HDL-HVL (Hardware Description Language-Hardware Verification Language) Co-emulation platforms.

Understanding of compilation and build flow.

Skilled at building images from scratch, making necessary design modifications to adapt to emulation.

Work closely with verification teams to define and implement comprehensive pre and post silicon test plans.

Interface effectively with design, verification, validation, and software development teams to understand their needs from an emulation perspective.

Experience in architecting emulation systems for various design scales (IP blocks, SOC, multi-chip systems).

Balancing performance and ease of debug.

Proficient in post-silicon bring-up, debugging, and issue reproduction on emulators.

Familiarity with Python and TCL scripting languages.

Exposure to domains such as PCIe, CXL, DDR, Flash, Memory, USB, and CPU.

Strong communication and collaboration skills to work effectively with cross-functional teams and domain experts.

Successfully manage multiple design releases and provide support for debugging customer issues.